xref: /freebsd/sys/contrib/device-tree/Bindings/net/nxp,dwmac-imx.yaml (revision 5956d97f4b3204318ceb6aa9c77bd0bc6ea87a41) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX8 DWMAC glue layer Device Tree Bindings
8
9maintainers:
10  - Joakim Zhang <qiangqing.zhang@nxp.com>
11
12# We need a select here so we don't match all nodes with 'snps,dwmac'
13select:
14  properties:
15    compatible:
16      contains:
17        enum:
18          - nxp,imx8mp-dwmac-eqos
19          - nxp,imx8dxl-dwmac-eqos
20  required:
21    - compatible
22
23allOf:
24  - $ref: "snps,dwmac.yaml#"
25
26properties:
27  compatible:
28    oneOf:
29      - items:
30          - enum:
31              - nxp,imx8mp-dwmac-eqos
32              - nxp,imx8dxl-dwmac-eqos
33          - const: snps,dwmac-5.10a
34
35  clocks:
36    minItems: 3
37    maxItems: 5
38    items:
39      - description: MAC host clock
40      - description: MAC apb clock
41      - description: MAC timer clock
42      - description: MAC RGMII TX clock
43      - description: EQOS MEM clock
44
45  clock-names:
46    minItems: 3
47    maxItems: 5
48    contains:
49      enum:
50        - stmmaceth
51        - pclk
52        - ptp_ref
53        - tx
54        - mem
55
56  intf_mode:
57    $ref: /schemas/types.yaml#/definitions/phandle-array
58    description:
59      Should be phandle/offset pair. The phandle to the syscon node which
60      encompases the GPR register, and the offset of the GPR register.
61
62  snps,rmii_refclk_ext:
63    $ref: /schemas/types.yaml#/definitions/flag
64    description:
65      To select RMII reference clock from external.
66
67required:
68  - compatible
69  - clocks
70  - clock-names
71
72unevaluatedProperties: false
73
74examples:
75  - |
76    #include <dt-bindings/interrupt-controller/arm-gic.h>
77    #include <dt-bindings/interrupt-controller/irq.h>
78    #include <dt-bindings/clock/imx8mp-clock.h>
79
80    eqos: ethernet@30bf0000 {
81            compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a";
82            reg = <0x30bf0000 0x10000>;
83            interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
84                         <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
85            interrupt-names = "macirq", "eth_wake_irq";
86            clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
87                     <&clk IMX8MP_CLK_QOS_ENET_ROOT>,
88                     <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
89                     <&clk IMX8MP_CLK_ENET_QOS>;
90            clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
91            phy-mode = "rgmii";
92            status = "disabled";
93    };
94