1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2# Copyright 2018 Linaro Ltd. 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/net/intel,ixp4xx-ethernet.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: Intel IXP4xx ethernet 9 10allOf: 11 - $ref: "ethernet-controller.yaml#" 12 13maintainers: 14 - Linus Walleij <linus.walleij@linaro.org> 15 16description: | 17 The Intel IXP4xx ethernet makes use of the IXP4xx NPE (Network 18 Processing Engine) and the IXP4xx Queue Manager to process 19 the ethernet frames. It can optionally contain an MDIO bus to 20 talk to PHYs. 21 22properties: 23 compatible: 24 const: intel,ixp4xx-ethernet 25 26 reg: 27 maxItems: 1 28 description: Ethernet MMIO address range 29 30 queue-rx: 31 $ref: '/schemas/types.yaml#/definitions/phandle-array' 32 maxItems: 1 33 description: phandle to the RX queue on the NPE 34 35 queue-txready: 36 $ref: '/schemas/types.yaml#/definitions/phandle-array' 37 maxItems: 1 38 description: phandle to the TX READY queue on the NPE 39 40 phy-mode: true 41 42 phy-handle: true 43 44 intel,npe-handle: 45 $ref: '/schemas/types.yaml#/definitions/phandle-array' 46 maxItems: 1 47 description: phandle to the NPE this ethernet instance is using 48 and the instance to use in the second cell 49 50 mdio: 51 $ref: mdio.yaml# 52 unevaluatedProperties: false 53 description: optional node for embedded MDIO controller 54 55required: 56 - compatible 57 - reg 58 - queue-rx 59 - queue-txready 60 - intel,npe-handle 61 62additionalProperties: false 63 64examples: 65 - | 66 npe: npe@c8006000 { 67 compatible = "intel,ixp4xx-network-processing-engine"; 68 reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>; 69 }; 70 71 ethernet@c8009000 { 72 compatible = "intel,ixp4xx-ethernet"; 73 reg = <0xc8009000 0x1000>; 74 queue-rx = <&qmgr 4>; 75 queue-txready = <&qmgr 21>; 76 intel,npe-handle = <&npe 1>; 77 phy-mode = "rgmii"; 78 phy-handle = <&phy1>; 79 }; 80 81 ethernet@c800c000 { 82 compatible = "intel,ixp4xx-ethernet"; 83 reg = <0xc800c000 0x1000>; 84 queue-rx = <&qmgr 3>; 85 queue-txready = <&qmgr 20>; 86 intel,npe-handle = <&npe 2>; 87 phy-mode = "rgmii"; 88 phy-handle = <&phy2>; 89 90 mdio { 91 #address-cells = <1>; 92 #size-cells = <0>; 93 phy1: ethernet-phy@1 { 94 reg = <1>; 95 }; 96 phy2: ethernet-phy@2 { 97 reg = <2>; 98 }; 99 }; 100 }; 101