1* Faraday Technology FTGMAC100 gigabit ethernet controller 2 3Required properties: 4- compatible: "faraday,ftgmac100" 5 6 Must also contain one of these if used as part of an Aspeed AST2400 7 or 2500 family SoC as they have some subtle tweaks to the 8 implementation: 9 10 - "aspeed,ast2400-mac" 11 - "aspeed,ast2500-mac" 12 - "aspeed,ast2600-mac" 13 14- reg: Address and length of the register set for the device 15- interrupts: Should contain ethernet controller interrupt 16 17Optional properties: 18- phy-mode: See ethernet.txt file in the same directory. If the property is 19 absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for 20 aspeed parts. Other (unknown) parts will accept any value. 21- use-ncsi: Use the NC-SI stack instead of an MDIO PHY. Currently assumes 22 rmii (100bT) but kept as a separate property in case NC-SI grows support 23 for a gigabit link. 24- no-hw-checksum: Used to disable HW checksum support. Here for backward 25 compatibility as the driver now should have correct defaults based on 26 the SoC. 27- clocks: In accordance with the generic clock bindings. Must describe the MAC 28 IP clock, and optionally an RMII RCLK gate for the AST2500/AST2600. The 29 required MAC clock must be the first cell. 30- clock-names: 31 32 - "MACCLK": The MAC IP clock 33 - "RCLK": Clock gate for the RMII RCLK 34 35Example: 36 37 mac0: ethernet@1e660000 { 38 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100"; 39 reg = <0x1e660000 0x180>; 40 interrupts = <2>; 41 use-ncsi; 42 }; 43