xref: /freebsd/sys/contrib/device-tree/Bindings/net/dsa/b53.txt (revision 2e3f49888ec8851bafb22011533217487764fdb0) 
1Broadcom BCM53xx Ethernet switches
2==================================
3
4Required properties:
5
6- compatible: For external switch chips, compatible string must be exactly one
7  of: "brcm,bcm5325"
8      "brcm,bcm53115"
9      "brcm,bcm53125"
10      "brcm,bcm53128"
11      "brcm,bcm5365"
12      "brcm,bcm5395"
13      "brcm,bcm5389"
14      "brcm,bcm5397"
15      "brcm,bcm5398"
16
17  For the BCM11360 SoC, must be:
18      "brcm,bcm11360-srab" and the mandatory "brcm,cygnus-srab" string
19
20  For the BCM5310x SoCs with an integrated switch, must be one of:
21      "brcm,bcm53010-srab"
22      "brcm,bcm53011-srab"
23      "brcm,bcm53012-srab"
24      "brcm,bcm53018-srab"
25      "brcm,bcm53019-srab" and the mandatory "brcm,bcm5301x-srab" string
26
27  For the BCM5831X/BCM1140x SoCs with an integrated switch, must be one of:
28      "brcm,bcm11404-srab"
29      "brcm,bcm11407-srab"
30      "brcm,bcm11409-srab"
31      "brcm,bcm58310-srab"
32      "brcm,bcm58311-srab"
33      "brcm,bcm58313-srab" and the mandatory "brcm,omega-srab" string
34
35  For the BCM585xx/586XX/88312 SoCs with an integrated switch, must be one of:
36      "brcm,bcm58522-srab"
37      "brcm,bcm58523-srab"
38      "brcm,bcm58525-srab"
39      "brcm,bcm58622-srab"
40      "brcm,bcm58623-srab"
41      "brcm,bcm58625-srab"
42      "brcm,bcm88312-srab" and the mandatory "brcm,nsp-srab string
43
44  For the BCM63xx/33xx SoCs with an integrated switch, must be one of:
45      "brcm,bcm3384-switch"
46      "brcm,bcm6328-switch"
47      "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch"
48
49Required properties for BCM585xx/586xx/88312 SoCs:
50
51 - reg: a total of 3 register base addresses, the first one must be the
52   Switch Register Access block base, the second is the port 5/4 mux
53   configuration register and the third one is the SGMII configuration
54   and status register base address.
55
56 - interrupts: a total of 13 interrupts must be specified, in the following
57   order: port 0-5, 7-8 link status change, then the integrated PHY interrupt,
58   then the timestamping interrupt and the sleep timer interrupts for ports
59   5,7,8.
60
61Optional properties for BCM585xx/586xx/88312 SoCs:
62
63  - reg-names: a total of 3 names matching the 3 base register address, must
64    be in the following order:
65	"srab"
66	"mux_config"
67	"sgmii_config"
68
69  - interrupt-names: a total of 13 names matching the 13 interrupts specified
70    must be in the following order:
71	"link_state_p0"
72	"link_state_p1"
73	"link_state_p2"
74	"link_state_p3"
75	"link_state_p4"
76	"link_state_p5"
77	"link_state_p7"
78	"link_state_p8"
79	"phy"
80	"ts"
81	"imp_sleep_timer_p5"
82	"imp_sleep_timer_p7"
83	"imp_sleep_timer_p8"
84
85See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional
86required and optional properties.
87
88Examples:
89
90Ethernet switch connected via MDIO to the host, CPU port wired to eth0:
91
92	eth0: ethernet@10001000 {
93		compatible = "brcm,unimac";
94		reg = <0x10001000 0x1000>;
95
96		fixed-link {
97			speed = <1000>;
98			full-duplex;
99		};
100	};
101
102	mdio0: mdio@10000000 {
103		compatible = "brcm,unimac-mdio";
104		#address-cells = <1>;
105		#size-cells = <0>;
106
107		switch0: ethernet-switch@1e {
108			compatible = "brcm,bcm53125";
109			reg = <30>;
110			#address-cells = <1>;
111			#size-cells = <0>;
112
113			ports {
114				#address-cells = <1>;
115				#size-cells = <0>;
116
117				port0@0 {
118					reg = <0>;
119					label = "lan1";
120				};
121
122				port1@1 {
123					reg = <1>;
124					label = "lan2";
125				};
126
127				port5@5 {
128					reg = <5>;
129					label = "cable-modem";
130					fixed-link {
131						speed = <1000>;
132						full-duplex;
133					};
134					phy-mode = "rgmii-txid";
135				};
136
137				port8@8 {
138					reg = <8>;
139					label = "cpu";
140					fixed-link {
141						speed = <1000>;
142						full-duplex;
143					};
144					phy-mode = "rgmii-txid";
145					ethernet = <&eth0>;
146				};
147			};
148		};
149	};
150