1Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings 2--------------------------------------------------------- 3 4Required properties: 5- compatible : Should be: 6 - "xlnx,zynq-can-1.0" for Zynq CAN controllers 7 - "xlnx,axi-can-1.00.a" for Axi CAN controllers 8 - "xlnx,canfd-1.0" for CAN FD controllers 9 - "xlnx,canfd-2.0" for CAN FD 2.0 controllers 10- reg : Physical base address and size of the controller 11 registers map. 12- interrupts : Property with a value describing the interrupt 13 number. 14- clock-names : List of input clock names 15 - "can_clk", "pclk" (For CANPS), 16 - "can_clk", "s_axi_aclk" (For AXI CAN and CAN FD). 17 (See clock bindings for details). 18- clocks : Clock phandles (see clock bindings for details). 19- tx-fifo-depth : Can Tx fifo depth (Zynq, Axi CAN). 20- rx-fifo-depth : Can Rx fifo depth (Zynq, Axi CAN, CAN FD in 21 sequential Rx mode). 22- tx-mailbox-count : Can Tx mailbox buffer count (CAN FD). 23- rx-mailbox-count : Can Rx mailbox buffer count (CAN FD in mailbox Rx 24 mode). 25 26 27Example: 28 29For Zynq CANPS Dts file: 30 zynq_can_0: can@e0008000 { 31 compatible = "xlnx,zynq-can-1.0"; 32 clocks = <&clkc 19>, <&clkc 36>; 33 clock-names = "can_clk", "pclk"; 34 reg = <0xe0008000 0x1000>; 35 interrupts = <0 28 4>; 36 interrupt-parent = <&intc>; 37 tx-fifo-depth = <0x40>; 38 rx-fifo-depth = <0x40>; 39 }; 40For Axi CAN Dts file: 41 axi_can_0: axi-can@40000000 { 42 compatible = "xlnx,axi-can-1.00.a"; 43 clocks = <&clkc 0>, <&clkc 1>; 44 clock-names = "can_clk","s_axi_aclk" ; 45 reg = <0x40000000 0x10000>; 46 interrupt-parent = <&intc>; 47 interrupts = <0 59 1>; 48 tx-fifo-depth = <0x40>; 49 rx-fifo-depth = <0x40>; 50 }; 51For CAN FD Dts file: 52 canfd_0: canfd@40000000 { 53 compatible = "xlnx,canfd-1.0"; 54 clocks = <&clkc 0>, <&clkc 1>; 55 clock-names = "can_clk", "s_axi_aclk"; 56 reg = <0x40000000 0x2000>; 57 interrupt-parent = <&intc>; 58 interrupts = <0 59 1>; 59 tx-mailbox-count = <0x20>; 60 rx-fifo-depth = <0x20>; 61 }; 62