1Renesas R-Car CAN FD controller Device Tree Bindings 2---------------------------------------------------- 3 4Required properties: 5- compatible: Must contain one or more of the following: 6 - "renesas,rcar-gen3-canfd" for R-Car Gen3 and RZ/G2 compatible controllers. 7 - "renesas,r8a774a1-canfd" for R8A774A1 (RZ/G2M) compatible controller. 8 - "renesas,r8a774b1-canfd" for R8A774B1 (RZ/G2N) compatible controller. 9 - "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller. 10 - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller. 11 - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller. 12 - "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible controller. 13 - "renesas,r8a77970-canfd" for R8A77970 (R-Car V3M) compatible controller. 14 - "renesas,r8a77980-canfd" for R8A77980 (R-Car V3H) compatible controller. 15 - "renesas,r8a77990-canfd" for R8A77990 (R-Car E3) compatible controller. 16 - "renesas,r8a77995-canfd" for R8A77995 (R-Car D3) compatible controller. 17 18 When compatible with the generic version, nodes must list the 19 SoC-specific version corresponding to the platform first, followed by the 20 family-specific and/or generic versions. 21 22- reg: physical base address and size of the R-Car CAN FD register map. 23- interrupts: interrupt specifiers for the Channel & Global interrupts 24- clocks: phandles and clock specifiers for 3 clock inputs. 25- clock-names: 3 clock input name strings: "fck", "canfd", "can_clk". 26- pinctrl-0: pin control group to be used for this controller. 27- pinctrl-names: must be "default". 28 29Required child nodes: 30The controller supports two channels and each is represented as a child node. 31The name of the child nodes are "channel0" and "channel1" respectively. Each 32child node supports the "status" property only, which is used to 33enable/disable the respective channel. 34 35Required properties for R8A774A1, R8A774B1, R8A774C0, R8A7795, R8A7796, 36R8A77965, R8A77990, and R8A77995: 37In the denoted SoCs, canfd clock is a div6 clock and can be used by both CAN 38and CAN FD controller at the same time. It needs to be scaled to maximum 39frequency if any of these controllers use it. This is done using the below 40properties: 41 42- assigned-clocks: phandle of canfd clock. 43- assigned-clock-rates: maximum frequency of this clock. 44 45Optional property: 46The controller can operate in either CAN FD only mode (default) or 47Classical CAN only mode. The mode is global to both the channels. In order to 48enable the later, define the following optional property. 49 - renesas,no-can-fd: puts the controller in Classical CAN only mode. 50 51Example 52------- 53 54SoC common .dtsi file: 55 56 canfd: can@e66c0000 { 57 compatible = "renesas,r8a7795-canfd", 58 "renesas,rcar-gen3-canfd"; 59 reg = <0 0xe66c0000 0 0x8000>; 60 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 61 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 62 clocks = <&cpg CPG_MOD 914>, 63 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 64 <&can_clk>; 65 clock-names = "fck", "canfd", "can_clk"; 66 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 67 assigned-clock-rates = <40000000>; 68 power-domains = <&cpg>; 69 status = "disabled"; 70 71 channel0 { 72 status = "disabled"; 73 }; 74 75 channel1 { 76 status = "disabled"; 77 }; 78 }; 79 80Board specific .dts file: 81 82E.g. below enables Channel 1 alone in the board in Classical CAN only mode. 83 84&canfd { 85 pinctrl-0 = <&canfd1_pins>; 86 pinctrl-names = "default"; 87 renesas,no-can-fd; 88 status = "okay"; 89 90 channel1 { 91 status = "okay"; 92 }; 93}; 94 95E.g. below enables Channel 0 alone in the board using External clock 96as fCAN clock. 97 98&canfd { 99 pinctrl-0 = <&canfd0_pins &can_clk_pins>; 100 pinctrl-names = "default"; 101 status = "okay"; 102 103 channel0 { 104 status = "okay"; 105 }; 106}; 107