1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/can/ctu,ctucanfd.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: CTU CAN FD Open-source IP Core 8 9description: | 10 Open-source CAN FD IP core developed at the Czech Technical University in Prague 11 12 The core sources and documentation on project page 13 [1] sources : https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core 14 [2] datasheet : https://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf 15 16 Integration in Xilinx Zynq SoC based system together with 17 OpenCores SJA1000 compatible controllers 18 [3] project : https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top 19 Martin Jerabek dimploma thesis with integration and testing 20 framework description 21 [4] PDF : https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-canfd.pdf 22 23maintainers: 24 - Pavel Pisa <pisa@cmp.felk.cvut.cz> 25 - Ondrej Ille <ondrej.ille@gmail.com> 26 - Martin Jerabek <martin.jerabek01@gmail.com> 27 28allOf: 29 - $ref: can-controller.yaml# 30 31properties: 32 compatible: 33 oneOf: 34 - items: 35 - const: ctu,ctucanfd-2 36 - const: ctu,ctucanfd 37 - const: ctu,ctucanfd 38 39 reg: 40 maxItems: 1 41 42 interrupts: 43 maxItems: 1 44 45 clocks: 46 description: | 47 phandle of reference clock (100 MHz is appropriate 48 for FPGA implementation on Zynq-7000 system). 49 maxItems: 1 50 51required: 52 - compatible 53 - reg 54 - interrupts 55 - clocks 56 57additionalProperties: false 58 59examples: 60 - | 61 ctu_can_fd_0: can@43c30000 { 62 compatible = "ctu,ctucanfd"; 63 interrupts = <0 30 4>; 64 clocks = <&clkc 15>; 65 reg = <0x43c30000 0x10000>; 66 }; 67