xref: /freebsd/sys/contrib/device-tree/Bindings/net/brcm,unimac-mdio.yaml (revision e67e85659c0de33e617e5fbf1028c6e8b49eee53)

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/brcm,unimac-mdio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom UniMAC MDIO bus controller

maintainers:
  - Doug Berger <opendmb@gmail.com>
  - Florian Fainelli <f.fainelli@gmail.com>
  - Rafał Miłecki <rafal@milecki.pl>

allOf:
  - $ref: mdio.yaml#

properties:
  compatible:
    enum:
      - brcm,genet-mdio-v1
      - brcm,genet-mdio-v2
      - brcm,genet-mdio-v3
      - brcm,genet-mdio-v4
      - brcm,genet-mdio-v5
      - brcm,unimac-mdio

  reg:
    minItems: 1
    items:
      - description: base register
      - description: indirect accesses to larger than 16-bits MDIO transactions

  reg-names:
    minItems: 1
    items:
      - const: mdio
      - const: mdio_indir_rw

  interrupts:
    oneOf:
      - description: >
          Interrupt shared with the Ethernet MAC or Ethernet switch this MDIO
          block is integrated from
      - items:
          - description: |
              "mdio done" interrupt
          - description: |
              "mdio error" interrupt

  interrupt-names:
    oneOf:
      - const: mdio_done_error
      - items:
          - const: mdio_done
          - const: mdio_error

  clocks:
    description: A reference to the clock supplying the MDIO bus controller

  clock-frequency:
    description: >
      The MDIO bus clock that must be output by the MDIO bus hardware, if
      absent, the default hardware values are used

unevaluatedProperties: false

required:
  - reg
  - '#address-cells'
  - '#size-cells'

examples:
  - |
    mdio@403c0 {
        compatible = "brcm,unimac-mdio";
        reg = <0x403c0 0x8>, <0x40300 0x18>;
        reg-names = "mdio", "mdio_indir_rw";
        #address-cells = <1>;
        #size-cells = <0>;

        ethernet-phy@0 {
            compatible = "ethernet-phy-ieee802.3-c22";
            reg = <0>;
        };
    };