xref: /freebsd/sys/contrib/device-tree/Bindings/net/allwinner,sun8i-a83t-emac.yaml (revision d5b0e70f7e04d971691517ce1304d86a1e367e2e) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A83t EMAC Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  compatible:
15    oneOf:
16      - const: allwinner,sun8i-a83t-emac
17      - const: allwinner,sun8i-h3-emac
18      - const: allwinner,sun8i-r40-gmac
19      - const: allwinner,sun8i-v3s-emac
20      - const: allwinner,sun50i-a64-emac
21      - items:
22          - enum:
23              - allwinner,sun20i-d1-emac
24              - allwinner,sun50i-h6-emac
25          - const: allwinner,sun50i-a64-emac
26
27  reg:
28    maxItems: 1
29
30  interrupts:
31    maxItems: 1
32
33  interrupt-names:
34    const: macirq
35
36  clocks:
37    maxItems: 1
38
39  clock-names:
40    const: stmmaceth
41
42  syscon:
43    $ref: /schemas/types.yaml#/definitions/phandle
44    description:
45      Phandle to the device containing the EMAC or GMAC clock
46      register
47
48required:
49  - compatible
50  - reg
51  - interrupts
52  - interrupt-names
53  - clocks
54  - clock-names
55  - resets
56  - reset-names
57  - phy-handle
58  - phy-mode
59  - syscon
60
61allOf:
62  - $ref: "snps,dwmac.yaml#"
63  - if:
64      properties:
65        compatible:
66          contains:
67            enum:
68              - allwinner,sun8i-a83t-emac
69              - allwinner,sun8i-h3-emac
70              - allwinner,sun8i-v3s-emac
71              - allwinner,sun50i-a64-emac
72
73    then:
74      properties:
75        allwinner,tx-delay-ps:
76          default: 0
77          minimum: 0
78          maximum: 700
79          multipleOf: 100
80          description:
81            External RGMII PHY TX clock delay chain value in ps.
82
83        allwinner,rx-delay-ps:
84          default: 0
85          minimum: 0
86          maximum: 3100
87          multipleOf: 100
88          description:
89            External RGMII PHY TX clock delay chain value in ps.
90
91  - if:
92      properties:
93        compatible:
94          contains:
95            enum:
96              - allwinner,sun8i-r40-gmac
97
98    then:
99      properties:
100        allwinner,rx-delay-ps:
101          default: 0
102          minimum: 0
103          maximum: 700
104          multipleOf: 100
105          description:
106            External RGMII PHY TX clock delay chain value in ps.
107
108  - if:
109      properties:
110        compatible:
111          contains:
112            enum:
113              - allwinner,sun8i-h3-emac
114              - allwinner,sun8i-v3s-emac
115
116    then:
117      properties:
118        allwinner,leds-active-low:
119          $ref: /schemas/types.yaml#/definitions/flag
120          description:
121            EPHY LEDs are active low.
122
123        mdio-mux:
124          type: object
125          unevaluatedProperties: false
126
127          properties:
128            compatible:
129              const: allwinner,sun8i-h3-mdio-mux
130
131            mdio-parent-bus:
132              $ref: /schemas/types.yaml#/definitions/phandle
133              description:
134                Phandle to EMAC MDIO.
135
136            "#address-cells":
137              const: 1
138
139            "#size-cells":
140              const: 0
141
142            mdio@1:
143              $ref: mdio.yaml#
144              unevaluatedProperties: false
145              description: Internal MDIO Bus
146
147              properties:
148                compatible:
149                  const: allwinner,sun8i-h3-mdio-internal
150
151                reg:
152                  const: 1
153
154              patternProperties:
155                "^ethernet-phy@[0-9a-f]$":
156                  type: object
157                  description:
158                    Integrated PHY node
159
160                  properties:
161                    clocks:
162                      maxItems: 1
163
164                    resets:
165                      maxItems: 1
166
167                  required:
168                    - clocks
169                    - resets
170
171
172            mdio@2:
173              $ref: mdio.yaml#
174              unevaluatedProperties: false
175              description: External MDIO Bus (H3 only)
176
177              properties:
178                reg:
179                  const: 2
180
181          required:
182            - compatible
183            - mdio-parent-bus
184            - mdio@1
185
186unevaluatedProperties: false
187
188examples:
189  - |
190    ethernet@1c0b000 {
191        compatible = "allwinner,sun8i-h3-emac";
192        syscon = <&syscon>;
193        reg = <0x01c0b000 0x104>;
194        interrupts = <0 82 1>;
195        interrupt-names = "macirq";
196        resets = <&ccu 12>;
197        reset-names = "stmmaceth";
198        clocks = <&ccu 27>;
199        clock-names = "stmmaceth";
200
201        phy-handle = <&int_mii_phy>;
202        phy-mode = "mii";
203        allwinner,leds-active-low;
204
205        mdio1: mdio {
206            #address-cells = <1>;
207            #size-cells = <0>;
208            compatible = "snps,dwmac-mdio";
209        };
210
211        mdio-mux {
212            compatible = "allwinner,sun8i-h3-mdio-mux";
213            #address-cells = <1>;
214            #size-cells = <0>;
215
216            mdio-parent-bus = <&mdio1>;
217
218            int_mii_phy: mdio@1 {
219                compatible = "allwinner,sun8i-h3-mdio-internal";
220                reg = <1>;
221                #address-cells = <1>;
222                #size-cells = <0>;
223
224                ethernet-phy@1 {
225                    reg = <1>;
226                    clocks = <&ccu 67>;
227                    resets = <&ccu 39>;
228                    phy-is-integrated;
229                };
230            };
231
232            mdio@2 {
233                reg = <2>;
234                #address-cells = <1>;
235                #size-cells = <0>;
236            };
237        };
238    };
239
240  - |
241    ethernet@1c0b000 {
242        compatible = "allwinner,sun8i-h3-emac";
243        syscon = <&syscon>;
244        reg = <0x01c0b000 0x104>;
245        interrupts = <0 82 1>;
246        interrupt-names = "macirq";
247        resets = <&ccu 12>;
248        reset-names = "stmmaceth";
249        clocks = <&ccu 27>;
250        clock-names = "stmmaceth";
251
252        phy-handle = <&ext_rgmii_phy>;
253        phy-mode = "rgmii";
254        allwinner,leds-active-low;
255
256        mdio2: mdio {
257            #address-cells = <1>;
258            #size-cells = <0>;
259            compatible = "snps,dwmac-mdio";
260        };
261
262        mdio-mux {
263            compatible = "allwinner,sun8i-h3-mdio-mux";
264            #address-cells = <1>;
265            #size-cells = <0>;
266            mdio-parent-bus = <&mdio2>;
267
268            mdio@1 {
269                compatible = "allwinner,sun8i-h3-mdio-internal";
270                reg = <1>;
271                #address-cells = <1>;
272                #size-cells = <0>;
273
274                ethernet-phy@1 {
275                    reg = <1>;
276                    clocks = <&ccu 67>;
277                    resets = <&ccu 39>;
278                };
279            };
280
281            mdio@2 {
282                reg = <2>;
283                #address-cells = <1>;
284                #size-cells = <0>;
285
286                ext_rgmii_phy: ethernet-phy@1 {
287                    reg = <1>;
288                };
289            };
290        };
291    };
292
293  - |
294    ethernet@1c0b000 {
295        compatible = "allwinner,sun8i-a83t-emac";
296        syscon = <&syscon>;
297        reg = <0x01c0b000 0x104>;
298        interrupts = <0 82 1>;
299        interrupt-names = "macirq";
300        resets = <&ccu 13>;
301        reset-names = "stmmaceth";
302        clocks = <&ccu 27>;
303        clock-names = "stmmaceth";
304        phy-handle = <&ext_rgmii_phy1>;
305        phy-mode = "rgmii";
306
307        mdio {
308            compatible = "snps,dwmac-mdio";
309            #address-cells = <1>;
310            #size-cells = <0>;
311
312            ext_rgmii_phy1: ethernet-phy@1 {
313                reg = <1>;
314            };
315        };
316    };
317
318...
319