1Andestech(nds32) AE3XX Platform 2----------------------------------------------------------------------------- 3The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. It 4is composed of one Andestech(nds32) processor and AE3XX. 5 6Required properties (in root node): 7- compatible = "andestech,ae3xx"; 8 9Example: 10/dts-v1/; 11/ { 12 compatible = "andestech,ae3xx"; 13 #address-cells = <1>; 14 #size-cells = <1>; 15 interrupt-parent = <&intc>; 16}; 17 18Andestech(nds32) AG101P Platform 19----------------------------------------------------------------------------- 20AG101P is a generic SoC Platform IP that works with any of Andestech(nds32) 21processors to provide a cost-effective and high performance solution for 22majority of embedded systems in variety of application domains. Users may 23simply attach their IP on one of the system buses together with certain glue 24logics to complete a SoC solution for a specific application. With 25comprehensive simulation and design environments, users may evaluate the 26system performance of their applications and track bugs of their designs 27efficiently. The optional hardware development platform further provides real 28system environment for early prototyping and software/hardware co-development. 29 30Required properties (in root node): 31 compatible = "andestech,ag101p"; 32 33Example: 34/dts-v1/; 35/ { 36 compatible = "andestech,ag101p"; 37 #address-cells = <1>; 38 #size-cells = <1>; 39 interrupt-parent = <&intc>; 40}; 41