1*5956d97fSEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0 2*5956d97fSEmmanuel Vadot%YAML 1.2 3*5956d97fSEmmanuel Vadot--- 4*5956d97fSEmmanuel Vadot$id: http://devicetree.org/schemas/mux/gpio-mux.yaml# 5*5956d97fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*5956d97fSEmmanuel Vadot 7*5956d97fSEmmanuel Vadottitle: GPIO-based multiplexer controller bindings 8*5956d97fSEmmanuel Vadot 9*5956d97fSEmmanuel Vadotmaintainers: 10*5956d97fSEmmanuel Vadot - Peter Rosin <peda@axentia.se> 11*5956d97fSEmmanuel Vadot 12*5956d97fSEmmanuel Vadotdescription: |+ 13*5956d97fSEmmanuel Vadot Define what GPIO pins are used to control a multiplexer. Or several 14*5956d97fSEmmanuel Vadot multiplexers, if the same pins control more than one multiplexer. 15*5956d97fSEmmanuel Vadot 16*5956d97fSEmmanuel Vadot The multiplexer state is defined as the number represented by the 17*5956d97fSEmmanuel Vadot multiplexer GPIO pins, where the first pin is the least significant 18*5956d97fSEmmanuel Vadot bit. An active pin is a binary 1, an inactive pin is a binary 0. 19*5956d97fSEmmanuel Vadot 20*5956d97fSEmmanuel Vadotproperties: 21*5956d97fSEmmanuel Vadot compatible: 22*5956d97fSEmmanuel Vadot const: gpio-mux 23*5956d97fSEmmanuel Vadot 24*5956d97fSEmmanuel Vadot mux-gpios: 25*5956d97fSEmmanuel Vadot description: 26*5956d97fSEmmanuel Vadot List of gpios used to control the multiplexer, least significant bit first. 27*5956d97fSEmmanuel Vadot 28*5956d97fSEmmanuel Vadot '#mux-control-cells': 29*5956d97fSEmmanuel Vadot const: 0 30*5956d97fSEmmanuel Vadot 31*5956d97fSEmmanuel Vadot idle-state: 32*5956d97fSEmmanuel Vadot default: -1 33*5956d97fSEmmanuel Vadot 34*5956d97fSEmmanuel Vadotrequired: 35*5956d97fSEmmanuel Vadot - compatible 36*5956d97fSEmmanuel Vadot - mux-gpios 37*5956d97fSEmmanuel Vadot - "#mux-control-cells" 38*5956d97fSEmmanuel Vadot 39*5956d97fSEmmanuel VadotadditionalProperties: false 40*5956d97fSEmmanuel Vadot 41*5956d97fSEmmanuel Vadotexamples: 42*5956d97fSEmmanuel Vadot - | 43*5956d97fSEmmanuel Vadot #include <dt-bindings/gpio/gpio.h> 44*5956d97fSEmmanuel Vadot 45*5956d97fSEmmanuel Vadot mux: mux-controller { 46*5956d97fSEmmanuel Vadot compatible = "gpio-mux"; 47*5956d97fSEmmanuel Vadot #mux-control-cells = <0>; 48*5956d97fSEmmanuel Vadot 49*5956d97fSEmmanuel Vadot mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, 50*5956d97fSEmmanuel Vadot <&pioA 1 GPIO_ACTIVE_HIGH>; 51*5956d97fSEmmanuel Vadot }; 52*5956d97fSEmmanuel Vadot 53*5956d97fSEmmanuel Vadot adc-mux { 54*5956d97fSEmmanuel Vadot compatible = "io-channel-mux"; 55*5956d97fSEmmanuel Vadot io-channels = <&adc 0>; 56*5956d97fSEmmanuel Vadot io-channel-names = "parent"; 57*5956d97fSEmmanuel Vadot 58*5956d97fSEmmanuel Vadot mux-controls = <&mux>; 59*5956d97fSEmmanuel Vadot 60*5956d97fSEmmanuel Vadot channels = "sync-1", "in", "out", "sync-2"; 61*5956d97fSEmmanuel Vadot }; 62*5956d97fSEmmanuel Vadot 63*5956d97fSEmmanuel Vadot i2c-mux { 64*5956d97fSEmmanuel Vadot compatible = "i2c-mux"; 65*5956d97fSEmmanuel Vadot i2c-parent = <&i2c1>; 66*5956d97fSEmmanuel Vadot 67*5956d97fSEmmanuel Vadot mux-controls = <&mux>; 68*5956d97fSEmmanuel Vadot 69*5956d97fSEmmanuel Vadot #address-cells = <1>; 70*5956d97fSEmmanuel Vadot #size-cells = <0>; 71*5956d97fSEmmanuel Vadot 72*5956d97fSEmmanuel Vadot i2c@0 { 73*5956d97fSEmmanuel Vadot reg = <0>; 74*5956d97fSEmmanuel Vadot #address-cells = <1>; 75*5956d97fSEmmanuel Vadot #size-cells = <0>; 76*5956d97fSEmmanuel Vadot 77*5956d97fSEmmanuel Vadot ssd1307: oled@3c { 78*5956d97fSEmmanuel Vadot reg = <0x3c>; 79*5956d97fSEmmanuel Vadot }; 80*5956d97fSEmmanuel Vadot }; 81*5956d97fSEmmanuel Vadot 82*5956d97fSEmmanuel Vadot i2c@3 { 83*5956d97fSEmmanuel Vadot reg = <3>; 84*5956d97fSEmmanuel Vadot #address-cells = <1>; 85*5956d97fSEmmanuel Vadot #size-cells = <0>; 86*5956d97fSEmmanuel Vadot 87*5956d97fSEmmanuel Vadot pca9555: pca9555@20 { 88*5956d97fSEmmanuel Vadot reg = <0x20>; 89*5956d97fSEmmanuel Vadot }; 90*5956d97fSEmmanuel Vadot }; 91*5956d97fSEmmanuel Vadot }; 92*5956d97fSEmmanuel Vadot... 93