1*2846c905SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*2846c905SEmmanuel Vadot%YAML 1.2 3*2846c905SEmmanuel Vadot--- 4*2846c905SEmmanuel Vadot$id: http://devicetree.org/schemas/mtd/ti,davinci-nand.yaml# 5*2846c905SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*2846c905SEmmanuel Vadot 7*2846c905SEmmanuel Vadottitle: TI DaVinci NAND controller 8*2846c905SEmmanuel Vadot 9*2846c905SEmmanuel Vadotmaintainers: 10*2846c905SEmmanuel Vadot - Marcus Folkesson <marcus.folkesson@gmail.com> 11*2846c905SEmmanuel Vadot 12*2846c905SEmmanuel VadotallOf: 13*2846c905SEmmanuel Vadot - $ref: nand-controller.yaml 14*2846c905SEmmanuel Vadot 15*2846c905SEmmanuel Vadotproperties: 16*2846c905SEmmanuel Vadot compatible: 17*2846c905SEmmanuel Vadot enum: 18*2846c905SEmmanuel Vadot - ti,davinci-nand 19*2846c905SEmmanuel Vadot - ti,keystone-nand 20*2846c905SEmmanuel Vadot 21*2846c905SEmmanuel Vadot reg: 22*2846c905SEmmanuel Vadot items: 23*2846c905SEmmanuel Vadot - description: Access window. 24*2846c905SEmmanuel Vadot - description: AEMIF control registers. 25*2846c905SEmmanuel Vadot 26*2846c905SEmmanuel Vadot partitions: 27*2846c905SEmmanuel Vadot $ref: /schemas/mtd/partitions/partitions.yaml 28*2846c905SEmmanuel Vadot 29*2846c905SEmmanuel Vadot ti,davinci-chipselect: 30*2846c905SEmmanuel Vadot description: 31*2846c905SEmmanuel Vadot Number of chipselect. Indicate on the davinci_nand driver which 32*2846c905SEmmanuel Vadot chipselect is used for accessing the nand. 33*2846c905SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 34*2846c905SEmmanuel Vadot enum: [0, 1, 2, 3] 35*2846c905SEmmanuel Vadot 36*2846c905SEmmanuel Vadot ti,davinci-mask-ale: 37*2846c905SEmmanuel Vadot description: 38*2846c905SEmmanuel Vadot Mask for ALE. Needed for executing address phase. These offset will be 39*2846c905SEmmanuel Vadot added to the base address for the chip select space the NAND Flash 40*2846c905SEmmanuel Vadot device is connected to. 41*2846c905SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 42*2846c905SEmmanuel Vadot default: 0x08 43*2846c905SEmmanuel Vadot 44*2846c905SEmmanuel Vadot ti,davinci-mask-cle: 45*2846c905SEmmanuel Vadot description: 46*2846c905SEmmanuel Vadot Mask for CLE. Needed for executing command phase. These offset will be 47*2846c905SEmmanuel Vadot added to the base address for the chip select space the NAND Flash device 48*2846c905SEmmanuel Vadot is connected to. 49*2846c905SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 50*2846c905SEmmanuel Vadot default: 0x10 51*2846c905SEmmanuel Vadot 52*2846c905SEmmanuel Vadot ti,davinci-mask-chipsel: 53*2846c905SEmmanuel Vadot description: 54*2846c905SEmmanuel Vadot Mask for chipselect address. Needed to mask addresses for given 55*2846c905SEmmanuel Vadot chipselect. 56*2846c905SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 57*2846c905SEmmanuel Vadot default: 0 58*2846c905SEmmanuel Vadot 59*2846c905SEmmanuel Vadot ti,davinci-ecc-bits: 60*2846c905SEmmanuel Vadot description: Used ECC bits. 61*2846c905SEmmanuel Vadot enum: [1, 4] 62*2846c905SEmmanuel Vadot 63*2846c905SEmmanuel Vadot ti,davinci-ecc-mode: 64*2846c905SEmmanuel Vadot description: Operation mode of the NAND ECC mode. 65*2846c905SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/string 66*2846c905SEmmanuel Vadot enum: [none, soft, hw, on-die] 67*2846c905SEmmanuel Vadot deprecated: true 68*2846c905SEmmanuel Vadot 69*2846c905SEmmanuel Vadot ti,davinci-nand-buswidth: 70*2846c905SEmmanuel Vadot description: Bus width to the NAND chip. 71*2846c905SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32 72*2846c905SEmmanuel Vadot enum: [8, 16] 73*2846c905SEmmanuel Vadot default: 8 74*2846c905SEmmanuel Vadot deprecated: true 75*2846c905SEmmanuel Vadot 76*2846c905SEmmanuel Vadot ti,davinci-nand-use-bbt: 77*2846c905SEmmanuel Vadot type: boolean 78*2846c905SEmmanuel Vadot description: 79*2846c905SEmmanuel Vadot Use flash based bad block table support. OOB identifier is saved in OOB 80*2846c905SEmmanuel Vadot area. 81*2846c905SEmmanuel Vadot deprecated: true 82*2846c905SEmmanuel Vadot 83*2846c905SEmmanuel Vadotrequired: 84*2846c905SEmmanuel Vadot - compatible 85*2846c905SEmmanuel Vadot - reg 86*2846c905SEmmanuel Vadot - ti,davinci-chipselect 87*2846c905SEmmanuel Vadot 88*2846c905SEmmanuel VadotunevaluatedProperties: false 89*2846c905SEmmanuel Vadot 90*2846c905SEmmanuel Vadotexamples: 91*2846c905SEmmanuel Vadot - | 92*2846c905SEmmanuel Vadot bus { 93*2846c905SEmmanuel Vadot #address-cells = <2>; 94*2846c905SEmmanuel Vadot #size-cells = <1>; 95*2846c905SEmmanuel Vadot 96*2846c905SEmmanuel Vadot nand-controller@2000000,0 { 97*2846c905SEmmanuel Vadot compatible = "ti,davinci-nand"; 98*2846c905SEmmanuel Vadot #address-cells = <1>; 99*2846c905SEmmanuel Vadot #size-cells = <0>; 100*2846c905SEmmanuel Vadot reg = <0 0x02000000 0x02000000>, 101*2846c905SEmmanuel Vadot <1 0x00000000 0x00008000>; 102*2846c905SEmmanuel Vadot 103*2846c905SEmmanuel Vadot ti,davinci-chipselect = <1>; 104*2846c905SEmmanuel Vadot ti,davinci-mask-ale = <0>; 105*2846c905SEmmanuel Vadot ti,davinci-mask-cle = <0>; 106*2846c905SEmmanuel Vadot ti,davinci-mask-chipsel = <0>; 107*2846c905SEmmanuel Vadot 108*2846c905SEmmanuel Vadot ti,davinci-nand-buswidth = <16>; 109*2846c905SEmmanuel Vadot ti,davinci-ecc-mode = "hw"; 110*2846c905SEmmanuel Vadot ti,davinci-ecc-bits = <4>; 111*2846c905SEmmanuel Vadot ti,davinci-nand-use-bbt; 112*2846c905SEmmanuel Vadot 113*2846c905SEmmanuel Vadot partitions { 114*2846c905SEmmanuel Vadot compatible = "fixed-partitions"; 115*2846c905SEmmanuel Vadot #address-cells = <1>; 116*2846c905SEmmanuel Vadot #size-cells = <1>; 117*2846c905SEmmanuel Vadot 118*2846c905SEmmanuel Vadot partition@0 { 119*2846c905SEmmanuel Vadot label = "u-boot env"; 120*2846c905SEmmanuel Vadot reg = <0 0x020000>; 121*2846c905SEmmanuel Vadot }; 122*2846c905SEmmanuel Vadot }; 123*2846c905SEmmanuel Vadot }; 124*2846c905SEmmanuel Vadot }; 125