1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mtd/ti,gpmc-onenand.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: OneNAND over Texas Instruments GPMC bus. 8 9maintainers: 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 12 13description: 14 GPMC connected OneNAND (found on OMAP boards) are represented 15 as child nodes of the GPMC controller. 16 17properties: 18 $nodename: 19 pattern: "^onenand@[0-9],[0,9]$" 20 21 compatible: 22 const: ti,omap2-onenand 23 24 reg: 25 items: 26 - description: | 27 Chip Select number, register offset and size of 28 OneNAND register window. 29 30 "#address-cells": true 31 32 "#size-cells": true 33 34 int-gpios: 35 description: GPIO specifier for the INT pin. 36 37patternProperties: 38 "@[0-9a-f]+$": 39 $ref: "/schemas/mtd/partitions/partition.yaml" 40 41allOf: 42 - $ref: "/schemas/memory-controllers/ti,gpmc-child.yaml" 43 44required: 45 - compatible 46 - reg 47 - "#address-cells" 48 - "#size-cells" 49 50unevaluatedProperties: false 51 52examples: 53 - | 54 gpmc: memory-controller@6e000000 { 55 compatible = "ti,omap3430-gpmc"; 56 reg = <0x6e000000 0x02d0>; 57 interrupts = <20>; 58 gpmc,num-cs = <8>; 59 gpmc,num-waitpins = <4>; 60 clocks = <&l3s_clkctrl>; 61 clock-names = "fck"; 62 #address-cells = <2>; 63 #size-cells = <1>; 64 65 ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */ 66 <1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */ 67 68 onenand@0,0 { 69 compatible = "ti,omap2-onenand"; 70 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ 71 #address-cells = <1>; 72 #size-cells = <1>; 73 74 partition@0 { 75 label = "bootloader"; 76 reg = <0x00000000 0x00100000>; 77 }; 78 79 partition@100000 { 80 label = "config"; 81 reg = <0x00100000 0x002c0000>; 82 }; 83 }; 84 }; 85