1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: STMicroelectronics Flexible Memory Controller 2 (FMC2) 8 9maintainers: 10 - Christophe Kerello <christophe.kerello@foss.st.com> 11 12properties: 13 compatible: 14 enum: 15 - st,stm32mp15-fmc2 16 - st,stm32mp1-fmc2-nfc 17 18 reg: 19 minItems: 6 20 maxItems: 7 21 22 interrupts: 23 maxItems: 1 24 25 dmas: 26 items: 27 - description: tx DMA channel 28 - description: rx DMA channel 29 - description: ecc DMA channel 30 31 dma-names: 32 items: 33 - const: tx 34 - const: rx 35 - const: ecc 36 37patternProperties: 38 "^nand@[a-f0-9]$": 39 type: object 40 properties: 41 nand-ecc-step-size: 42 const: 512 43 44 nand-ecc-strength: 45 enum: [1, 4, 8] 46 47allOf: 48 - $ref: nand-controller.yaml# 49 50 - if: 51 properties: 52 compatible: 53 contains: 54 const: st,stm32mp15-fmc2 55 then: 56 properties: 57 reg: 58 items: 59 - description: Registers 60 - description: Chip select 0 data 61 - description: Chip select 0 command 62 - description: Chip select 0 address space 63 - description: Chip select 1 data 64 - description: Chip select 1 command 65 - description: Chip select 1 address space 66 67 clocks: 68 maxItems: 1 69 70 resets: 71 maxItems: 1 72 73 required: 74 - clocks 75 76 - if: 77 properties: 78 compatible: 79 contains: 80 const: st,stm32mp1-fmc2-nfc 81 then: 82 properties: 83 reg: 84 items: 85 - description: Chip select 0 data 86 - description: Chip select 0 command 87 - description: Chip select 0 address space 88 - description: Chip select 1 data 89 - description: Chip select 1 command 90 - description: Chip select 1 address space 91 92required: 93 - compatible 94 - reg 95 - interrupts 96 97unevaluatedProperties: false 98 99examples: 100 - | 101 #include <dt-bindings/interrupt-controller/arm-gic.h> 102 #include <dt-bindings/clock/stm32mp1-clks.h> 103 #include <dt-bindings/reset/stm32mp1-resets.h> 104 105 nand-controller@58002000 { 106 compatible = "st,stm32mp15-fmc2"; 107 reg = <0x58002000 0x1000>, 108 <0x80000000 0x1000>, 109 <0x88010000 0x1000>, 110 <0x88020000 0x1000>, 111 <0x81000000 0x1000>, 112 <0x89010000 0x1000>, 113 <0x89020000 0x1000>; 114 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 115 dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>, 116 <&mdma1 20 0x2 0x12000a08 0x0 0x0>, 117 <&mdma1 21 0x2 0x12000a0a 0x0 0x0>; 118 dma-names = "tx", "rx", "ecc"; 119 clocks = <&rcc FMC_K>; 120 resets = <&rcc FMC_R>; 121 #address-cells = <1>; 122 #size-cells = <0>; 123 124 nand@0 { 125 reg = <0>; 126 nand-on-flash-bbt; 127 #address-cells = <1>; 128 #size-cells = <1>; 129 }; 130 }; 131 132... 133