xref: /freebsd/sys/contrib/device-tree/Bindings/mtd/nand-chip.yaml (revision e6bfd18d21b225af6a0ed67ceeaf1293b7b9eba5) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/nand-chip.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NAND Chip and NAND Controller Generic Binding
8
9maintainers:
10  - Miquel Raynal <miquel.raynal@bootlin.com>
11
12description: |
13  This file covers the generic description of a NAND chip. It implies that the
14  bus interface should not be taken into account: both raw NAND devices and
15  SPI-NAND devices are concerned by this description.
16
17properties:
18  reg:
19    description:
20      Contains the chip-select IDs.
21
22  nand-ecc-engine:
23    description: |
24      A phandle on the hardware ECC engine if any. There are
25      basically three possibilities:
26      1/ The ECC engine is part of the NAND controller, in this
27      case the phandle should reference the parent node.
28      2/ The ECC engine is part of the NAND part (on-die), in this
29      case the phandle should reference the node itself.
30      3/ The ECC engine is external, in this case the phandle should
31      reference the specific ECC engine node.
32    $ref: /schemas/types.yaml#/definitions/phandle
33
34  nand-use-soft-ecc-engine:
35    description: Use a software ECC engine.
36    type: boolean
37
38  nand-no-ecc-engine:
39    description: Do not use any ECC correction.
40    type: boolean
41
42  nand-ecc-algo:
43    description:
44      Desired ECC algorithm.
45    $ref: /schemas/types.yaml#/definitions/string
46    enum: [hamming, bch, rs]
47
48  nand-ecc-strength:
49    description:
50      Maximum number of bits that can be corrected per ECC step.
51    $ref: /schemas/types.yaml#/definitions/uint32
52    minimum: 1
53
54  nand-ecc-step-size:
55    description:
56      Number of data bytes covered by a single ECC step.
57    $ref: /schemas/types.yaml#/definitions/uint32
58    minimum: 1
59
60  secure-regions:
61    description:
62      Regions in the NAND chip which are protected using a secure element
63      like Trustzone. This property contains the start address and size of
64      the secure regions present.
65    $ref: /schemas/types.yaml#/definitions/uint64-matrix
66
67required:
68  - reg
69
70additionalProperties: true
71