xref: /freebsd/sys/contrib/device-tree/Bindings/mtd/marvell,nand-controller.yaml (revision cb14a3fe5122c879eae1fb480ed7ce82a699ddb6) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Marvell NAND Flash Controller (NFC)
8
9maintainers:
10  - Miquel Raynal <miquel.raynal@bootlin.com>
11
12properties:
13  compatible:
14    oneOf:
15      - items:
16          - const: marvell,armada-8k-nand-controller
17          - const: marvell,armada370-nand-controller
18      - enum:
19          - marvell,armada370-nand-controller
20          - marvell,pxa3xx-nand-controller
21      - description: legacy bindings
22        deprecated: true
23        enum:
24          - marvell,armada-8k-nand
25          - marvell,armada370-nand
26          - marvell,pxa3xx-nand
27
28  reg:
29    maxItems: 1
30
31  interrupts:
32    maxItems: 1
33
34  clocks:
35    description:
36      Shall reference the NAND controller clocks, the second one is
37      is only needed for the Armada 7K/8K SoCs
38    minItems: 1
39    maxItems: 2
40
41  clock-names:
42    minItems: 1
43    items:
44      - const: core
45      - const: reg
46
47  dmas:
48    maxItems: 1
49
50  dma-names:
51    items:
52      - const: data
53
54  marvell,system-controller:
55    $ref: /schemas/types.yaml#/definitions/phandle
56    description: Syscon node that handles NAND controller related registers
57
58patternProperties:
59  "^nand@[a-f0-9]$":
60    type: object
61    $ref: raw-nand-chip.yaml
62
63    properties:
64      reg:
65        minimum: 0
66        maximum: 3
67
68      nand-rb:
69        items:
70          - minimum: 0
71            maximum: 1
72
73      nand-ecc-step-size:
74        const: 512
75
76      nand-ecc-strength:
77        enum: [1, 4, 8, 12, 16]
78
79      nand-ecc-mode:
80        const: hw
81
82      marvell,nand-keep-config:
83        $ref: /schemas/types.yaml#/definitions/flag
84        description:
85          Orders the driver not to take the timings from the core and
86          leaving them completely untouched. Bootloader timings will then
87          be used.
88
89      marvell,nand-enable-arbiter:
90        $ref: /schemas/types.yaml#/definitions/flag
91        description:
92          To enable the arbiter, all boards blindly used it,
93          this bit was set by the bootloader for many boards and even if
94          it is marked reserved in several datasheets, it might be needed to set
95          it (otherwise it is harmless).
96        deprecated: true
97
98    required:
99      - reg
100      - nand-rb
101
102    unevaluatedProperties: false
103
104required:
105  - compatible
106  - reg
107  - interrupts
108  - clocks
109
110allOf:
111  - $ref: nand-controller.yaml#
112
113  - if:
114      properties:
115        compatible:
116          contains:
117            const: marvell,pxa3xx-nand-controller
118    then:
119      required:
120        - dmas
121        - dma-names
122
123  - if:
124      properties:
125        compatible:
126          contains:
127            const: marvell,armada-8k-nand-controller
128    then:
129      properties:
130        clocks:
131          minItems: 2
132
133        clock-names:
134          minItems: 2
135
136      required:
137        - marvell,system-controller
138
139    else:
140      properties:
141        clocks:
142          minItems: 1
143
144        clock-names:
145          minItems: 1
146
147
148unevaluatedProperties: false
149
150examples:
151  - |
152    #include <dt-bindings/interrupt-controller/arm-gic.h>
153    nand_controller: nand-controller@d0000 {
154        compatible = "marvell,armada370-nand-controller";
155        reg = <0xd0000 0x54>;
156        #address-cells = <1>;
157        #size-cells = <0>;
158        interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
159        clocks = <&coredivclk 0>;
160
161        nand@0 {
162            reg = <0>;
163            label = "main-storage";
164            nand-rb = <0>;
165            nand-ecc-mode = "hw";
166            marvell,nand-keep-config;
167            nand-on-flash-bbt;
168            nand-ecc-strength = <4>;
169            nand-ecc-step-size = <512>;
170
171            partitions {
172                compatible = "fixed-partitions";
173                #address-cells = <1>;
174                #size-cells = <1>;
175
176                partition@0 {
177                    label = "Rootfs";
178                    reg = <0x00000000 0x40000000>;
179                };
180            };
181        };
182    };
183
184  - |
185    cp0_nand_controller: nand-controller@720000 {
186        compatible = "marvell,armada-8k-nand-controller",
187                "marvell,armada370-nand-controller";
188        reg = <0x720000 0x54>;
189        #address-cells = <1>;
190        #size-cells = <0>;
191        interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
192        clock-names = "core", "reg";
193        clocks = <&cp0_clk 1 2>,
194                 <&cp0_clk 1 17>;
195        marvell,system-controller = <&cp0_syscon0>;
196
197        nand@0 {
198            reg = <0>;
199            label = "main-storage";
200            nand-rb = <0>;
201            nand-ecc-mode = "hw";
202            nand-ecc-strength = <8>;
203            nand-ecc-step-size = <512>;
204        };
205    };
206
207  - |
208    nand-controller@43100000 {
209        compatible = "marvell,pxa3xx-nand-controller";
210        reg = <0x43100000 90>;
211        interrupts = <45>;
212        clocks = <&clks 1>;
213        clock-names = "core";
214        dmas = <&pdma 97 3>;
215        dma-names = "data";
216        #address-cells = <1>;
217        #size-cells = <0>;
218        nand@0 {
219            reg = <0>;
220            nand-rb = <0>;
221            nand-ecc-mode = "hw";
222            marvell,nand-keep-config;
223        };
224    };
225
226...
227