1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: SPI NOR flash ST M25Pxx (and similar) serial flash chips 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12allOf: 13 - $ref: mtd.yaml# 14 - $ref: /schemas/spi/spi-peripheral-props.yaml# 15 16properties: 17 compatible: 18 oneOf: 19 - items: 20 - pattern: "^((((micron|spansion|st),)?\ 21 (m25p(40|80|16|32|64|128)|\ 22 n25q(32b|064|128a11|128a13|256a|512a|164k)))|\ 23 atmel,at25df(321a|641|081a)|\ 24 everspin,mr25h(10|40|128|256)|\ 25 (mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|\ 26 (mxicy|macronix),mx25u(4033|4035)|\ 27 (spansion,)?s25fl(128s|256s1|512s|008k|064k|164k)|\ 28 (sst|microchip),sst25vf(016b|032b|040b)|\ 29 (sst,)?sst26wf016b|\ 30 (sst,)?sst25wf(040b|080)|\ 31 winbond,w25x(80|32)|\ 32 (winbond,)?w25q(16|32(w|dw)?|64(dw)?|80bl|128(fw)?|256))$" 33 - const: jedec,spi-nor 34 - items: 35 - enum: 36 - issi,is25lp016d 37 - micron,mt25qu02g 38 - mxicy,mx25r1635f 39 - mxicy,mx25u6435f 40 - mxicy,mx25v8035f 41 - spansion,s25sl12801 42 - spansion,s25fs512s 43 - const: jedec,spi-nor 44 - const: jedec,spi-nor 45 description: 46 Must also include "jedec,spi-nor" for any SPI NOR flash that can be 47 identified by the JEDEC READ ID opcode (0x9F). 48 49 reg: 50 minItems: 1 51 maxItems: 2 52 53 m25p,fast-read: 54 type: boolean 55 description: 56 Use the "fast read" opcode to read data from the chip instead of the usual 57 "read" opcode. This opcode is not supported by all chips and support for 58 it can not be detected at runtime. Refer to your chips' datasheet to check 59 if this is supported by your chip. 60 61 broken-flash-reset: 62 type: boolean 63 description: 64 Some flash devices utilize stateful addressing modes (e.g., for 32-bit 65 addressing) which need to be managed carefully by a system. Because these 66 sorts of flash don't have a standardized software reset command, and 67 because some systems don't toggle the flash RESET# pin upon system reset 68 (if the pin even exists at all), there are systems which cannot reboot 69 properly if the flash is left in the "wrong" state. This boolean flag can 70 be used on such systems, to denote the absence of a reliable reset 71 mechanism. 72 73 reset-gpios: 74 description: 75 A GPIO line connected to the RESET (active low) signal of the device. 76 If "broken-flash-reset" is present then having this property does not 77 make any difference. 78 79 spi-cpol: true 80 spi-cpha: true 81 82dependencies: 83 spi-cpol: [ spi-cpha ] 84 spi-cpha: [ spi-cpol ] 85 86unevaluatedProperties: false 87 88examples: 89 - | 90 #include <dt-bindings/gpio/gpio.h> 91 spi { 92 #address-cells = <1>; 93 #size-cells = <0>; 94 95 flash@0 { 96 compatible = "spansion,m25p80", "jedec,spi-nor"; 97 reg = <0>; 98 spi-max-frequency = <40000000>; 99 m25p,fast-read; 100 reset-gpios = <&gpio 12 GPIO_ACTIVE_LOW>; 101 }; 102 }; 103... 104