1* Freescale General-Purpose Media Interface (GPMI) 2 3The GPMI nand controller provides an interface to control the 4NAND flash chips. 5 6Required properties: 7 - compatible : should be "fsl,<chip>-gpmi-nand", chip can be: 8 * imx23 9 * imx28 10 * imx6q 11 * imx6sx 12 * imx7d 13 - reg : should contain registers location and length for gpmi and bch. 14 - reg-names: Should contain the reg names "gpmi-nand" and "bch" 15 - interrupts : BCH interrupt number. 16 - interrupt-names : Should be "bch". 17 - dmas: DMA specifier, consisting of a phandle to DMA controller node 18 and GPMI DMA channel ID. 19 Refer to dma.txt and fsl-mxs-dma.txt for details. 20 - dma-names: Must be "rx-tx". 21 - clocks : clocks phandle and clock specifier corresponding to each clock 22 specified in clock-names. 23 - clock-names : The "gpmi_io" clock is always required. Which clocks are 24 exactly required depends on chip: 25 * imx23/imx28 : "gpmi_io" 26 * imx6q/sx : "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch" 27 * imx7d : "gpmi_io", "gpmi_bch_apb" 28 29Optional properties: 30 - nand-on-flash-bbt: boolean to enable on flash bbt option if not 31 present false 32 - fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC 33 strength required. The required ECC strength is 34 automatically discoverable for some flash 35 (e.g., according to the ONFI standard). 36 However, note that if this strength is not 37 discoverable or this property is not enabled, 38 the software may chooses an implementation-defined 39 ECC scheme. 40 - fsl,no-blockmark-swap: Don't swap the bad block marker from the OOB 41 area with the byte in the data area but rely on the 42 flash based BBT for identifying bad blocks. 43 NOTE: this is only valid in conjunction with 44 'nand-on-flash-bbt'. 45 WARNING: on i.MX28 blockmark swapping cannot be 46 disabled for the BootROM in the FCB. Thus, 47 partitions written from Linux with this feature 48 turned on may not be accessible by the BootROM 49 code. 50 - nand-ecc-strength: integer representing the number of bits to correct 51 per ECC step. Needs to be a multiple of 2. 52 - nand-ecc-step-size: integer representing the number of data bytes 53 that are covered by a single ECC step. The driver 54 supports 512 and 1024. 55 56The device tree may optionally contain sub-nodes describing partitions of the 57address space. See partition.txt for more detail. 58 59Examples: 60 61gpmi-nand@8000c000 { 62 compatible = "fsl,imx28-gpmi-nand"; 63 #address-cells = <1>; 64 #size-cells = <1>; 65 reg = <0x8000c000 2000>, <0x8000a000 2000>; 66 reg-names = "gpmi-nand", "bch"; 67 interrupts = <41>; 68 interrupt-names = "bch"; 69 dmas = <&dma_apbh 4>; 70 dma-names = "rx-tx"; 71 72 partition@0 { 73 ... 74 }; 75}; 76