1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys Designware Mobile Storage Host Controller Binding 8 9maintainers: 10 - Ulf Hansson <ulf.hansson@linaro.org> 11 - Jisheng Zhang <Jisheng.Zhang@synaptics.com> 12 13allOf: 14 - $ref: mmc-controller.yaml# 15 16properties: 17 compatible: 18 enum: 19 - rockchip,rk3568-dwcmshc 20 - snps,dwcmshc-sdhci 21 22 reg: 23 minItems: 1 24 items: 25 - description: Offset and length of the register set for the device 26 27 interrupts: 28 maxItems: 1 29 30 clocks: 31 minItems: 1 32 items: 33 - description: core clock 34 - description: bus clock for optional 35 - description: axi clock for rockchip specified 36 - description: block clock for rockchip specified 37 - description: timer clock for rockchip specified 38 39 40 clock-names: 41 minItems: 1 42 items: 43 - const: core 44 - const: bus 45 - const: axi 46 - const: block 47 - const: timer 48 49 rockchip,txclk-tapnum: 50 description: Specify the number of delay for tx sampling. 51 $ref: /schemas/types.yaml#/definitions/uint8 52 53 54required: 55 - compatible 56 - reg 57 - interrupts 58 - clocks 59 - clock-names 60 61unevaluatedProperties: false 62 63examples: 64 - | 65 mmc@fe310000 { 66 compatible = "rockchip,rk3568-dwcmshc"; 67 reg = <0xfe310000 0x10000>; 68 interrupts = <0 25 0x4>; 69 clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; 70 clock-names = "core", "bus", "axi", "block", "timer"; 71 bus-width = <8>; 72 #address-cells = <1>; 73 #size-cells = <0>; 74 }; 75 - | 76 mmc@aa0000 { 77 compatible = "snps,dwcmshc-sdhci"; 78 reg = <0xaa000 0x1000>; 79 interrupts = <0 25 0x4>; 80 clocks = <&cru 17>, <&cru 18>; 81 clock-names = "core", "bus"; 82 bus-width = <8>; 83 #address-cells = <1>; 84 #size-cells = <0>; 85 }; 86 87... 88