xref: /freebsd/sys/contrib/device-tree/Bindings/mmc/sdhci-atmel.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot* Atmel SDHCI controller
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotThis file documents the differences between the core properties in
4*c66ec88fSEmmanuel VadotDocumentation/devicetree/bindings/mmc/mmc.txt and the properties used by the
5*c66ec88fSEmmanuel Vadotsdhci-of-at91 driver.
6*c66ec88fSEmmanuel Vadot
7*c66ec88fSEmmanuel VadotRequired properties:
8*c66ec88fSEmmanuel Vadot- compatible:		Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci".
9*c66ec88fSEmmanuel Vadot- clocks:		Phandlers to the clocks.
10*c66ec88fSEmmanuel Vadot- clock-names:		Must be "hclock", "multclk", "baseclk" for
11*c66ec88fSEmmanuel Vadot			"atmel,sama5d2-sdhci".
12*c66ec88fSEmmanuel Vadot			Must be "hclock", "multclk" for "microchip,sam9x60-sdhci".
13*c66ec88fSEmmanuel Vadot
14*c66ec88fSEmmanuel VadotOptional properties:
15*c66ec88fSEmmanuel Vadot- assigned-clocks:	The same with "multclk".
16*c66ec88fSEmmanuel Vadot- assigned-clock-rates	The rate of "multclk" in order to not rely on the
17*c66ec88fSEmmanuel Vadot			gck configuration set by previous components.
18*c66ec88fSEmmanuel Vadot- microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is
19*c66ec88fSEmmanuel Vadot  inverted. The default polarity for this signal is described in the datasheet.
20*c66ec88fSEmmanuel Vadot  For instance on SAMA5D2, the pin is usually tied to the GND with a resistor
21*c66ec88fSEmmanuel Vadot  and a capacitor (see "SDMMC I/O Calibration" chapter).
22*c66ec88fSEmmanuel Vadot
23*c66ec88fSEmmanuel VadotExample:
24*c66ec88fSEmmanuel Vadot
25*c66ec88fSEmmanuel Vadotmmc0: sdio-host@a0000000 {
26*c66ec88fSEmmanuel Vadot	compatible = "atmel,sama5d2-sdhci";
27*c66ec88fSEmmanuel Vadot	reg = <0xa0000000 0x300>;
28*c66ec88fSEmmanuel Vadot	interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
29*c66ec88fSEmmanuel Vadot	clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
30*c66ec88fSEmmanuel Vadot	clock-names = "hclock", "multclk", "baseclk";
31*c66ec88fSEmmanuel Vadot	assigned-clocks = <&sdmmc0_gclk>;
32*c66ec88fSEmmanuel Vadot	assigned-clock-rates = <480000000>;
33*c66ec88fSEmmanuel Vadot};
34