1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Renesas SDHI SD/MMC controller 8 9maintainers: 10 - Wolfram Sang <wsa+renesas@sang-engineering.com> 11 12properties: 13 compatible: 14 oneOf: 15 - items: 16 - const: renesas,sdhi-sh73a0 # R-Mobile APE6 17 - items: 18 - const: renesas,sdhi-r7s72100 # RZ/A1H 19 - items: 20 - const: renesas,sdhi-r7s9210 # SH-Mobile AG5 21 - items: 22 - const: renesas,sdhi-r8a73a4 # R-Mobile APE6 23 - items: 24 - const: renesas,sdhi-r8a7740 # R-Mobile A1 25 - items: 26 - enum: 27 - renesas,sdhi-r8a7778 # R-Car M1 28 - renesas,sdhi-r8a7779 # R-Car H1 29 - const: renesas,rcar-gen1-sdhi # R-Car Gen1 30 - items: 31 - enum: 32 - renesas,sdhi-r8a7742 # RZ/G1H 33 - renesas,sdhi-r8a7743 # RZ/G1M 34 - renesas,sdhi-r8a7744 # RZ/G1N 35 - renesas,sdhi-r8a7745 # RZ/G1E 36 - renesas,sdhi-r8a77470 # RZ/G1C 37 - renesas,sdhi-r8a7790 # R-Car H2 38 - renesas,sdhi-r8a7791 # R-Car M2-W 39 - renesas,sdhi-r8a7792 # R-Car V2H 40 - renesas,sdhi-r8a7793 # R-Car M2-N 41 - renesas,sdhi-r8a7794 # R-Car E2 42 - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1 43 - items: 44 - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP) 45 - items: 46 - enum: 47 - renesas,sdhi-r8a774a1 # RZ/G2M 48 - renesas,sdhi-r8a774b1 # RZ/G2N 49 - renesas,sdhi-r8a774c0 # RZ/G2E 50 - renesas,sdhi-r8a774e1 # RZ/G2H 51 - renesas,sdhi-r8a7795 # R-Car H3 52 - renesas,sdhi-r8a7796 # R-Car M3-W 53 - renesas,sdhi-r8a77961 # R-Car M3-W+ 54 - renesas,sdhi-r8a77965 # R-Car M3-N 55 - renesas,sdhi-r8a77970 # R-Car V3M 56 - renesas,sdhi-r8a77980 # R-Car V3H 57 - renesas,sdhi-r8a77990 # R-Car E3 58 - renesas,sdhi-r8a77995 # R-Car D3 59 - renesas,sdhi-r9a07g043 # RZ/G2UL 60 - renesas,sdhi-r9a07g044 # RZ/G2{L,LC} 61 - renesas,sdhi-r9a07g054 # RZ/V2L 62 - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2 63 - items: 64 - enum: 65 - renesas,sdhi-r8a779a0 # R-Car V3U 66 - renesas,sdhi-r8a779f0 # R-Car S4-8 67 - const: renesas,rcar-gen4-sdhi # R-Car Gen4 68 69 reg: 70 maxItems: 1 71 72 interrupts: 73 minItems: 1 74 maxItems: 3 75 76 clocks: true 77 78 clock-names: true 79 80 dmas: 81 minItems: 4 82 maxItems: 4 83 84 dma-names: 85 minItems: 4 86 maxItems: 4 87 items: 88 enum: 89 - tx 90 - rx 91 92 power-domains: 93 maxItems: 1 94 95 resets: 96 maxItems: 1 97 98 pinctrl-0: 99 minItems: 1 100 maxItems: 2 101 102 pinctrl-1: 103 maxItems: 1 104 105 pinctrl-names: true 106 107 max-frequency: true 108 109allOf: 110 - $ref: "mmc-controller.yaml" 111 112 - if: 113 properties: 114 compatible: 115 contains: 116 enum: 117 - renesas,sdhi-r9a07g043 118 - renesas,sdhi-r9a07g044 119 - renesas,sdhi-r9a07g054 120 then: 121 properties: 122 clocks: 123 items: 124 - description: IMCLK, SDHI channel main clock1. 125 - description: CLK_HS, SDHI channel High speed clock which operates 126 4 times that of SDHI channel main clock1. 127 - description: IMCLK2, SDHI channel main clock2. When this clock is 128 turned off, external SD card detection cannot be 129 detected. 130 - description: ACLK, SDHI channel bus clock. 131 clock-names: 132 items: 133 - const: core 134 - const: clkh 135 - const: cd 136 - const: aclk 137 required: 138 - clock-names 139 - resets 140 else: 141 if: 142 properties: 143 compatible: 144 contains: 145 enum: 146 - renesas,rcar-gen2-sdhi 147 - renesas,rcar-gen3-sdhi 148 - renesas,rcar-gen4-sdhi 149 then: 150 properties: 151 clocks: 152 minItems: 1 153 maxItems: 3 154 clock-names: 155 minItems: 1 156 uniqueItems: true 157 items: 158 - const: core 159 - enum: [ clkh, cd ] 160 - const: cd 161 else: 162 properties: 163 clocks: 164 minItems: 1 165 maxItems: 2 166 clock-names: 167 minItems: 1 168 items: 169 - const: core 170 - const: cd 171 172 - if: 173 properties: 174 compatible: 175 contains: 176 const: renesas,sdhi-mmc-r8a77470 177 then: 178 properties: 179 pinctrl-names: 180 items: 181 - const: state_uhs 182 else: 183 properties: 184 pinctrl-names: 185 minItems: 1 186 items: 187 - const: default 188 - const: state_uhs 189 190 - if: 191 properties: 192 compatible: 193 contains: 194 enum: 195 - renesas,sdhi-r7s72100 196 - renesas,sdhi-r7s9210 197 then: 198 required: 199 - clock-names 200 description: 201 The internal card detection logic that exists in these controllers is 202 sectioned off to be run by a separate second clock source to allow 203 the main core clock to be turned off to save power. 204 205required: 206 - compatible 207 - reg 208 - interrupts 209 - clocks 210 - power-domains 211 212unevaluatedProperties: false 213 214examples: 215 - | 216 #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 217 #include <dt-bindings/interrupt-controller/arm-gic.h> 218 #include <dt-bindings/power/r8a7790-sysc.h> 219 220 sdhi0: mmc@ee100000 { 221 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 222 reg = <0xee100000 0x328>; 223 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 224 clocks = <&cpg CPG_MOD 314>; 225 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>; 226 dma-names = "tx", "rx", "tx", "rx"; 227 max-frequency = <195000000>; 228 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 229 resets = <&cpg 314>; 230 }; 231 232 sdhi1: mmc@ee120000 { 233 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 234 reg = <0xee120000 0x328>; 235 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 236 clocks = <&cpg CPG_MOD 313>; 237 dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>; 238 dma-names = "tx", "rx", "tx", "rx"; 239 max-frequency = <195000000>; 240 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 241 resets = <&cpg 313>; 242 }; 243 244 sdhi2: mmc@ee140000 { 245 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 246 reg = <0xee140000 0x100>; 247 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 248 clocks = <&cpg CPG_MOD 312>; 249 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>; 250 dma-names = "tx", "rx", "tx", "rx"; 251 max-frequency = <97500000>; 252 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 253 resets = <&cpg 312>; 254 }; 255 256 sdhi3: mmc@ee160000 { 257 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 258 reg = <0xee160000 0x100>; 259 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 260 clocks = <&cpg CPG_MOD 311>; 261 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>; 262 dma-names = "tx", "rx", "tx", "rx"; 263 max-frequency = <97500000>; 264 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 265 resets = <&cpg 311>; 266 }; 267