xref: /freebsd/sys/contrib/device-tree/Bindings/mmc/renesas,sdhi.yaml (revision dd41de95a84d979615a2ef11df6850622bf6184e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Renesas SDHI SD/MMC controller
8
9maintainers:
10  - Wolfram Sang <wsa+renesas@sang-engineering.com>
11
12allOf:
13  - $ref: "mmc-controller.yaml"
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - const: renesas,sdhi-sh73a0  # R-Mobile APE6
20      - items:
21          - const: renesas,sdhi-r7s72100 # RZ/A1H
22      - items:
23          - const: renesas,sdhi-r7s9210 # SH-Mobile AG5
24      - items:
25          - const: renesas,sdhi-r8a73a4 # R-Mobile APE6
26      - items:
27          - const: renesas,sdhi-r8a7740 # R-Mobile A1
28      - items:
29          - enum:
30              - renesas,sdhi-r8a7778 # R-Car M1
31              - renesas,sdhi-r8a7779 # R-Car H1
32          - const: renesas,rcar-gen1-sdhi # R-Car Gen1
33      - items:
34          - enum:
35              - renesas,sdhi-r8a7742  # RZ/G1H
36              - renesas,sdhi-r8a7743  # RZ/G1M
37              - renesas,sdhi-r8a7744  # RZ/G1N
38              - renesas,sdhi-r8a7745  # RZ/G1E
39              - renesas,sdhi-r8a77470 # RZ/G1C
40              - renesas,sdhi-r8a7790  # R-Car H2
41              - renesas,sdhi-r8a7791  # R-Car M2-W
42              - renesas,sdhi-r8a7792  # R-Car V2H
43              - renesas,sdhi-r8a7793  # R-Car M2-N
44              - renesas,sdhi-r8a7794  # R-Car E2
45          - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1
46      - items:
47          - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
48      - items:
49          - enum:
50              - renesas,sdhi-r8a774a1 # RZ/G2M
51              - renesas,sdhi-r8a774b1 # RZ/G2N
52              - renesas,sdhi-r8a774c0 # RZ/G2E
53              - renesas,sdhi-r8a774e1 # RZ/G2H
54              - renesas,sdhi-r8a7795  # R-Car H3
55              - renesas,sdhi-r8a7796  # R-Car M3-W
56              - renesas,sdhi-r8a77961 # R-Car M3-W+
57              - renesas,sdhi-r8a77965 # R-Car M3-N
58              - renesas,sdhi-r8a77970 # R-Car V3M
59              - renesas,sdhi-r8a77980 # R-Car V3H
60              - renesas,sdhi-r8a77990 # R-Car E3
61              - renesas,sdhi-r8a77995 # R-Car D3
62          - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
63
64  reg:
65    maxItems: 1
66
67  interrupts:
68    minItems: 1
69    maxItems: 3
70
71  clocks:
72    minItems: 1
73    maxItems: 2
74
75  clock-names:
76    minItems: 1
77    maxItems: 2
78    items:
79      - const: core
80      - const: cd
81
82  dmas:
83    minItems: 4
84    maxItems: 4
85
86  dma-names:
87    minItems: 4
88    maxItems: 4
89    items:
90      enum:
91        - tx
92        - rx
93
94  power-domains:
95    maxItems: 1
96
97  resets:
98    maxItems: 1
99
100  pinctrl-0:
101    minItems: 1
102    maxItems: 2
103
104  pinctrl-1:
105    maxItems: 1
106
107  pinctrl-names:
108    minItems: 1
109    maxItems: 2
110    items:
111      - const: default
112      - const: state_uhs
113
114  max-frequency: true
115
116required:
117  - compatible
118  - reg
119  - interrupts
120  - clocks
121  - power-domains
122
123if:
124  properties:
125    compatible:
126      items:
127        enum:
128          - renesas,sdhi-r7s72100
129          - renesas,sdhi-r7s9210
130then:
131  required:
132    - clock-names
133  description:
134    The internal card detection logic that exists in these controllers is
135    sectioned off to be run by a separate second clock source to allow
136    the main core clock to be turned off to save power.
137
138unevaluatedProperties: false
139
140examples:
141  - |
142    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
143    #include <dt-bindings/interrupt-controller/arm-gic.h>
144    #include <dt-bindings/power/r8a7790-sysc.h>
145
146    sdhi0: mmc@ee100000 {
147            compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
148            reg = <0xee100000 0x328>;
149            interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
150            clocks = <&cpg CPG_MOD 314>;
151            dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>;
152            dma-names = "tx", "rx", "tx", "rx";
153            max-frequency = <195000000>;
154            power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
155            resets = <&cpg 314>;
156    };
157
158    sdhi1: mmc@ee120000 {
159             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
160             reg = <0xee120000 0x328>;
161             interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
162             clocks = <&cpg CPG_MOD 313>;
163             dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>;
164             dma-names = "tx", "rx", "tx", "rx";
165             max-frequency = <195000000>;
166             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
167             resets = <&cpg 313>;
168    };
169
170    sdhi2: mmc@ee140000 {
171             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
172             reg = <0xee140000 0x100>;
173             interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
174             clocks = <&cpg CPG_MOD 312>;
175             dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>;
176             dma-names = "tx", "rx", "tx", "rx";
177             max-frequency = <97500000>;
178             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
179             resets = <&cpg 312>;
180     };
181
182     sdhi3: mmc@ee160000 {
183              compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
184              reg = <0xee160000 0x100>;
185              interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
186              clocks = <&cpg CPG_MOD 311>;
187              dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>;
188              dma-names = "tx", "rx", "tx", "rx";
189              max-frequency = <97500000>;
190              power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
191              resets = <&cpg 311>;
192    };
193