1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Renesas SDHI SD/MMC controller 8 9maintainers: 10 - Wolfram Sang <wsa+renesas@sang-engineering.com> 11 12properties: 13 compatible: 14 oneOf: 15 - items: 16 - const: renesas,sdhi-sh73a0 # R-Mobile APE6 17 - items: 18 - const: renesas,sdhi-r7s72100 # RZ/A1H 19 - items: 20 - const: renesas,sdhi-r7s9210 # SH-Mobile AG5 21 - items: 22 - const: renesas,sdhi-r8a73a4 # R-Mobile APE6 23 - items: 24 - const: renesas,sdhi-r8a7740 # R-Mobile A1 25 - items: 26 - enum: 27 - renesas,sdhi-r8a7778 # R-Car M1 28 - renesas,sdhi-r8a7779 # R-Car H1 29 - const: renesas,rcar-gen1-sdhi # R-Car Gen1 30 - items: 31 - enum: 32 - renesas,sdhi-r8a7742 # RZ/G1H 33 - renesas,sdhi-r8a7743 # RZ/G1M 34 - renesas,sdhi-r8a7744 # RZ/G1N 35 - renesas,sdhi-r8a7745 # RZ/G1E 36 - renesas,sdhi-r8a77470 # RZ/G1C 37 - renesas,sdhi-r8a7790 # R-Car H2 38 - renesas,sdhi-r8a7791 # R-Car M2-W 39 - renesas,sdhi-r8a7792 # R-Car V2H 40 - renesas,sdhi-r8a7793 # R-Car M2-N 41 - renesas,sdhi-r8a7794 # R-Car E2 42 - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1 43 - items: 44 - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP) 45 - items: 46 - enum: 47 - renesas,sdhi-r8a774a1 # RZ/G2M 48 - renesas,sdhi-r8a774b1 # RZ/G2N 49 - renesas,sdhi-r8a774c0 # RZ/G2E 50 - renesas,sdhi-r8a774e1 # RZ/G2H 51 - renesas,sdhi-r8a7795 # R-Car H3 52 - renesas,sdhi-r8a7796 # R-Car M3-W 53 - renesas,sdhi-r8a77961 # R-Car M3-W+ 54 - renesas,sdhi-r8a77965 # R-Car M3-N 55 - renesas,sdhi-r8a77970 # R-Car V3M 56 - renesas,sdhi-r8a77980 # R-Car V3H 57 - renesas,sdhi-r8a77990 # R-Car E3 58 - renesas,sdhi-r8a77995 # R-Car D3 59 - renesas,sdhi-r9a07g043 # RZ/G2UL 60 - renesas,sdhi-r9a07g044 # RZ/G2{L,LC} 61 - renesas,sdhi-r9a07g054 # RZ/V2L 62 - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2 63 - items: 64 - enum: 65 - renesas,sdhi-r8a779a0 # R-Car V3U 66 - renesas,sdhi-r8a779f0 # R-Car S4-8 67 - renesas,sdhi-r8a779g0 # R-Car V4H 68 - const: renesas,rcar-gen4-sdhi # R-Car Gen4 69 70 reg: 71 maxItems: 1 72 73 interrupts: 74 minItems: 1 75 maxItems: 3 76 77 clocks: true 78 79 clock-names: true 80 81 dmas: 82 minItems: 4 83 maxItems: 4 84 85 dma-names: 86 minItems: 4 87 maxItems: 4 88 items: 89 enum: 90 - tx 91 - rx 92 93 iommus: 94 maxItems: 1 95 96 power-domains: 97 maxItems: 1 98 99 resets: 100 maxItems: 1 101 102 pinctrl-0: 103 minItems: 1 104 maxItems: 2 105 106 pinctrl-1: 107 maxItems: 1 108 109 pinctrl-names: true 110 111 max-frequency: true 112 113allOf: 114 - $ref: "mmc-controller.yaml" 115 116 - if: 117 properties: 118 compatible: 119 contains: 120 enum: 121 - renesas,sdhi-r9a07g043 122 - renesas,sdhi-r9a07g044 123 - renesas,sdhi-r9a07g054 124 then: 125 properties: 126 clocks: 127 items: 128 - description: IMCLK, SDHI channel main clock1. 129 - description: CLK_HS, SDHI channel High speed clock which operates 130 4 times that of SDHI channel main clock1. 131 - description: IMCLK2, SDHI channel main clock2. When this clock is 132 turned off, external SD card detection cannot be 133 detected. 134 - description: ACLK, SDHI channel bus clock. 135 clock-names: 136 items: 137 - const: core 138 - const: clkh 139 - const: cd 140 - const: aclk 141 required: 142 - clock-names 143 - resets 144 else: 145 if: 146 properties: 147 compatible: 148 contains: 149 enum: 150 - renesas,rcar-gen2-sdhi 151 - renesas,rcar-gen3-sdhi 152 - renesas,rcar-gen4-sdhi 153 then: 154 properties: 155 clocks: 156 minItems: 1 157 maxItems: 3 158 clock-names: 159 minItems: 1 160 uniqueItems: true 161 items: 162 - const: core 163 - enum: [ clkh, cd ] 164 - const: cd 165 else: 166 properties: 167 clocks: 168 minItems: 1 169 maxItems: 2 170 clock-names: 171 minItems: 1 172 items: 173 - const: core 174 - const: cd 175 176 - if: 177 properties: 178 compatible: 179 contains: 180 const: renesas,sdhi-mmc-r8a77470 181 then: 182 properties: 183 pinctrl-names: 184 items: 185 - const: state_uhs 186 else: 187 properties: 188 pinctrl-names: 189 minItems: 1 190 items: 191 - const: default 192 - const: state_uhs 193 194 - if: 195 properties: 196 compatible: 197 contains: 198 enum: 199 - renesas,sdhi-r7s72100 200 - renesas,sdhi-r7s9210 201 then: 202 required: 203 - clock-names 204 description: 205 The internal card detection logic that exists in these controllers is 206 sectioned off to be run by a separate second clock source to allow 207 the main core clock to be turned off to save power. 208 209required: 210 - compatible 211 - reg 212 - interrupts 213 - clocks 214 - power-domains 215 216unevaluatedProperties: false 217 218examples: 219 - | 220 #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 221 #include <dt-bindings/interrupt-controller/arm-gic.h> 222 #include <dt-bindings/power/r8a7790-sysc.h> 223 224 sdhi0: mmc@ee100000 { 225 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 226 reg = <0xee100000 0x328>; 227 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 228 clocks = <&cpg CPG_MOD 314>; 229 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>; 230 dma-names = "tx", "rx", "tx", "rx"; 231 max-frequency = <195000000>; 232 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 233 resets = <&cpg 314>; 234 }; 235 236 sdhi1: mmc@ee120000 { 237 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 238 reg = <0xee120000 0x328>; 239 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 240 clocks = <&cpg CPG_MOD 313>; 241 dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>; 242 dma-names = "tx", "rx", "tx", "rx"; 243 max-frequency = <195000000>; 244 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 245 resets = <&cpg 313>; 246 }; 247 248 sdhi2: mmc@ee140000 { 249 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 250 reg = <0xee140000 0x100>; 251 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 252 clocks = <&cpg CPG_MOD 312>; 253 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>; 254 dma-names = "tx", "rx", "tx", "rx"; 255 max-frequency = <97500000>; 256 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 257 resets = <&cpg 312>; 258 }; 259 260 sdhi3: mmc@ee160000 { 261 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 262 reg = <0xee160000 0x100>; 263 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 264 clocks = <&cpg CPG_MOD 311>; 265 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>; 266 dma-names = "tx", "rx", "tx", "rx"; 267 max-frequency = <97500000>; 268 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 269 resets = <&cpg 311>; 270 }; 271