xref: /freebsd/sys/contrib/device-tree/Bindings/mmc/fsl-imx-esdhc.yaml (revision ec0ea6efa1ad229d75c394c1a9b9cac33af2b1d3) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
8
9maintainers:
10  - Shawn Guo <shawnguo@kernel.org>
11
12allOf:
13  - $ref: "mmc-controller.yaml"
14
15description: |
16  The Enhanced Secure Digital Host Controller on Freescale i.MX family
17  provides an interface for MMC, SD, and SDIO types of memory cards.
18
19  This file documents differences between the core properties described
20  by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
21
22properties:
23  compatible:
24    oneOf:
25      - enum:
26          - fsl,imx25-esdhc
27          - fsl,imx35-esdhc
28          - fsl,imx51-esdhc
29          - fsl,imx53-esdhc
30          - fsl,imx6q-usdhc
31          - fsl,imx6sl-usdhc
32          - fsl,imx6sx-usdhc
33          - fsl,imx6ull-usdhc
34          - fsl,imx7d-usdhc
35          - fsl,imx7ulp-usdhc
36      - items:
37          - enum:
38              - fsl,imx8mm-usdhc
39              - fsl,imx8mn-usdhc
40              - fsl,imx8mp-usdhc
41              - fsl,imx8mq-usdhc
42              - fsl,imx8qm-usdhc
43              - fsl,imx8qxp-usdhc
44          - const: fsl,imx7d-usdhc
45
46  reg:
47    maxItems: 1
48
49  interrupts:
50    maxItems: 1
51
52  fsl,wp-controller:
53    description: |
54      boolean, if present, indicate to use controller internal write protection.
55    type: boolean
56
57  fsl,delay-line:
58    $ref: /schemas/types.yaml#/definitions/uint32
59    description: |
60      Specify the number of delay cells for override mode.
61      This is used to set the clock delay for DLL(Delay Line) on override mode
62      to select a proper data sampling window in case the clock quality is not good
63      due to signal path is too long on the board. Please refer to eSDHC/uSDHC
64      chapter, DLL (Delay Line) section in RM for details.
65    default: 0
66
67  voltage-ranges:
68    $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
69    description: |
70      Specify the voltage range in case there are software transparent level
71      shifters on the outputs of the controller. Two cells are required, first
72      cell specifies minimum slot voltage (mV), second cell specifies maximum
73      slot voltage (mV).
74    items:
75      items:
76        - description: value for minimum slot voltage
77        - description: value for maximum slot voltage
78    maxItems: 1
79
80  fsl,tuning-start-tap:
81    $ref: /schemas/types.yaml#/definitions/uint32
82    description: |
83      Specify the start delay cell point when send first CMD19 in tuning procedure.
84    default: 0
85
86  fsl,tuning-step:
87    $ref: /schemas/types.yaml#/definitions/uint32
88    description: |
89      Specify the increasing delay cell steps in tuning procedure.
90      The uSDHC use one delay cell as default increasing step to do tuning process.
91      This property allows user to change the tuning step to more than one delay
92      cells which is useful for some special boards or cards when the default
93      tuning step can't find the proper delay window within limited tuning retries.
94    default: 0
95
96  fsl,strobe-dll-delay-target:
97    $ref: /schemas/types.yaml#/definitions/uint32
98    description: |
99      Specify the strobe dll control slave delay target.
100      This delay target programming host controller loopback read clock, and this
101      property allows user to change the delay target for the strobe input read clock.
102      If not use this property, driver default set the delay target to value 7.
103      Only eMMC HS400 mode need to take care of this property.
104    default: 0
105
106  clocks:
107    maxItems: 3
108    description:
109      Handle clocks for the sdhc controller.
110
111  clock-names:
112    items:
113      - const: ipg
114      - const: ahb
115      - const: per
116
117  pinctrl-names:
118    minItems: 1
119    maxItems: 4
120    items:
121      - const: default
122      - const: state_100mhz
123      - const: state_200mhz
124      - const: sleep
125
126required:
127  - compatible
128  - reg
129  - interrupts
130
131unevaluatedProperties: false
132
133examples:
134  - |
135    mmc@70004000 {
136        compatible = "fsl,imx51-esdhc";
137        reg = <0x70004000 0x4000>;
138        interrupts = <1>;
139        fsl,wp-controller;
140    };
141
142    mmc@70008000 {
143        compatible = "fsl,imx51-esdhc";
144        reg = <0x70008000 0x4000>;
145        interrupts = <2>;
146        cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
147        wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
148    };
149