1* Microsemi MIPS CPUs 2 3Boards with a SoC of the Microsemi MIPS family shall have the following 4properties: 5 6Required properties: 7- compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2" 8 9 10* Other peripherals: 11 12o CPU chip regs: 13 14The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous 15functionalities: chip ID, general purpose register for software use, reset 16controller, hardware status and configuration, efuses. 17 18Required properties: 19- compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon" 20- reg : Should contain registers location and length 21 22Example: 23 syscon@71070000 { 24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon"; 25 reg = <0x71070000 0x1c>; 26 }; 27 28 29o CPU system control: 30 31The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of 32the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU 33endianness, CPU bus control, CPU status. 34 35Required properties: 36- compatible: Should be "mscc,ocelot-cpu-syscon", "syscon" 37- reg : Should contain registers location and length 38 39Example: 40 syscon@70000000 { 41 compatible = "mscc,ocelot-cpu-syscon", "syscon"; 42 reg = <0x70000000 0x2c>; 43 }; 44 45o HSIO regs: 46 47The SoC has a few registers (HSIO) handling miscellaneous functionalities: 48configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and 49status, SerDes muxing and a thermal sensor. 50 51Required properties: 52- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd" 53- reg : Should contain registers location and length 54 55Example: 56 syscon@10d0000 { 57 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd"; 58 reg = <0x10d0000 0x10000>; 59 }; 60