xref: /freebsd/sys/contrib/device-tree/Bindings/mfd/ti,j721e-system-controller.yaml (revision 59c8e88e72633afbc47a4ace0d2170d00d51f7dc) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/mfd/ti,j721e-system-controller.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: TI J721e System Controller Registers R/W
9
10description: |
11  This represents the Control Module registers (CTRL_MMR0) on the SoC.
12  System controller node represents a register region containing a set
13  of miscellaneous registers. The registers are not cohesive enough to
14  represent as any specific type of device. The typical use-case is
15  for some other node's driver, or platform-specific code, to acquire
16  a reference to the syscon node (e.g. by phandle, node path, or
17  search using a specific compatible value), interrogate the node (or
18  associated OS driver) to determine the location of the registers,
19  and access the registers directly.
20
21maintainers:
22  - Kishon Vijay Abraham I <kishon@ti.com>
23  - Roger Quadros <rogerq@kernel.org>
24
25properties:
26  compatible:
27    items:
28      - enum:
29          - ti,j7200-system-controller
30          - ti,j721e-system-controller
31          - ti,j721s2-system-controller
32      - const: syscon
33      - const: simple-mfd
34
35  reg:
36    maxItems: 1
37
38  "#address-cells":
39    const: 1
40
41  "#size-cells":
42    const: 1
43
44  ranges: true
45
46patternProperties:
47  # Optional children
48  "^mux-controller@[0-9a-f]+$":
49    type: object
50    description:
51      This is the SERDES lane control mux.
52
53  "^clock-controller@[0-9a-f]+$":
54    type: object
55    $ref: /schemas/clock/ti,am654-ehrpwm-tbclk.yaml#
56    description:
57      Clock provider for TI EHRPWM nodes.
58
59  "phy@[0-9a-f]+$":
60    type: object
61    $ref: /schemas/phy/ti,phy-gmii-sel.yaml#
62    description:
63      The phy node corresponding to the ethernet MAC.
64
65  "^chipid@[0-9a-f]+$":
66    type: object
67    $ref: /schemas/hwinfo/ti,k3-socinfo.yaml#
68    description:
69      The node corresponding to SoC chip identification.
70
71required:
72  - compatible
73  - reg
74  - "#address-cells"
75  - "#size-cells"
76  - ranges
77
78additionalProperties: false
79
80examples:
81  - |
82    scm_conf: scm-conf@100000 {
83        compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
84        reg = <0x00100000 0x1c000>;
85        #address-cells = <1>;
86        #size-cells = <1>;
87        ranges;
88
89        serdes_ln_ctrl: mux-controller@4080 {
90            compatible = "mmio-mux";
91            reg = <0x00004080 0x50>;
92
93            #mux-control-cells = <1>;
94            mux-reg-masks =
95                <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
96                <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
97                <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
98                <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
99                <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
100                /* SERDES4 lane0/1/2/3 select */
101        };
102
103        clock-controller@4140 {
104            compatible = "ti,am654-ehrpwm-tbclk", "syscon";
105            reg = <0x4140 0x18>;
106            #clock-cells = <1>;
107        };
108
109        chipid@14 {
110            compatible = "ti,am654-chipid";
111            reg = <0x14 0x4>;
112        };
113    };
114...
115