xref: /freebsd/sys/contrib/device-tree/Bindings/mfd/ti,j721e-system-controller.yaml (revision 058ac3e8063366dafa634d9107642e12b038bf09) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/mfd/ti,j721e-system-controller.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: TI J721e System Controller Registers R/W Device Tree Bindings
9
10description: |
11  This represents the Control Module registers (CTRL_MMR0) on the SoC.
12  System controller node represents a register region containing a set
13  of miscellaneous registers. The registers are not cohesive enough to
14  represent as any specific type of device. The typical use-case is
15  for some other node's driver, or platform-specific code, to acquire
16  a reference to the syscon node (e.g. by phandle, node path, or
17  search using a specific compatible value), interrogate the node (or
18  associated OS driver) to determine the location of the registers,
19  and access the registers directly.
20
21maintainers:
22  - Kishon Vijay Abraham I <kishon@ti.com>
23  - Roger Quadros <rogerq@kernel.org>
24
25properties:
26  compatible:
27    items:
28      - enum:
29          - ti,j721e-system-controller
30      - const: syscon
31      - const: simple-mfd
32
33  reg:
34    maxItems: 1
35
36  "#address-cells":
37    const: 1
38
39  "#size-cells":
40    const: 1
41
42  ranges: true
43
44patternProperties:
45  # Optional children
46  "^mux-controller@[0-9a-f]+$":
47    type: object
48    description:
49      This is the SERDES lane control mux.
50
51  "^clock-controller@[0-9a-f]+$":
52    type: object
53    $ref: /schemas/clock/ti,am654-ehrpwm-tbclk.yaml#
54    description:
55      Clock provider for TI EHRPWM nodes.
56
57required:
58  - compatible
59  - reg
60  - "#address-cells"
61  - "#size-cells"
62  - ranges
63
64additionalProperties: false
65
66examples:
67  - |
68    scm_conf: scm-conf@100000 {
69        compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
70        reg = <0x00100000 0x1c000>;
71        #address-cells = <1>;
72        #size-cells = <1>;
73        ranges;
74
75        serdes_ln_ctrl: mux-controller@4080 {
76            compatible = "mmio-mux";
77            reg = <0x00004080 0x50>;
78
79            #mux-control-cells = <1>;
80            mux-reg-masks =
81                <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
82                <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
83                <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
84                <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
85                <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
86                /* SERDES4 lane0/1/2/3 select */
87        };
88
89        clock-controller@4140 {
90            compatible = "ti,am654-ehrpwm-tbclk", "syscon";
91            reg = <0x4140 0x18>;
92            #clock-cells = <1>;
93        };
94    };
95...
96