xref: /freebsd/sys/contrib/device-tree/Bindings/mfd/sprd,ums512-glbreg.yaml (revision 2e3507c25e42292b45a5482e116d278f5515d04d) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2022 Unisoc Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/mfd/sprd,ums512-glbreg.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Unisoc System Global Register
9
10maintainers:
11  - Orson Zhai <orsonzhai@gmail.com>
12  - Baolin Wang <baolin.wang7@gmail.com>
13  - Chunyan Zhang <zhang.lyra@gmail.com>
14
15description:
16  Unisoc system global registers provide register map
17  for clocks and some multimedia modules of the SoC.
18
19properties:
20  compatible:
21    items:
22      - const: sprd,ums512-glbregs
23      - const: syscon
24      - const: simple-mfd
25
26  "#address-cells":
27    const: 1
28
29  "#size-cells":
30    const: 1
31
32  ranges:
33    maxItems: 1
34
35  reg:
36    maxItems: 1
37
38patternProperties:
39  "^clock-controller@[0-9a-f]+$":
40    type: object
41    $ref: /schemas/clock/sprd,ums512-clk.yaml#
42    description:
43      Clock controller for the SoC clocks.
44
45required:
46  - compatible
47  - reg
48
49additionalProperties: false
50
51examples:
52  - |
53    ap_apb_regs: syscon@71000000 {
54      compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd";
55      reg = <0x71000000 0x3000>;
56      #address-cells = <1>;
57      #size-cells = <1>;
58      ranges = <0 0x71000000 0x3000>;
59
60      clock-controller@0 {
61        compatible = "sprd,ums512-apahb-gate";
62        reg = <0x0 0x2000>;
63        #clock-cells = <1>;
64      };
65    };
66
67  - |
68    ap_intc5_regs: syscon@32360000 {
69      compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd";
70      reg = <0x32360000 0x1000>;
71    };
72