1*c66ec88fSEmmanuel VadotHisilicon Hi655x Power Management Integrated Circuit (PMIC) 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotThe hardware layout for access PMIC Hi655x from AP SoC Hi6220. 4*c66ec88fSEmmanuel VadotBetween PMIC Hi655x and Hi6220, the physical signal channel is SSI. 5*c66ec88fSEmmanuel VadotWe can use memory-mapped I/O to communicate. 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot+----------------+ +-------------+ 8*c66ec88fSEmmanuel Vadot| | | | 9*c66ec88fSEmmanuel Vadot| Hi6220 | SSI bus | Hi655x | 10*c66ec88fSEmmanuel Vadot| |-------------| | 11*c66ec88fSEmmanuel Vadot| |(REGMAP_MMIO)| | 12*c66ec88fSEmmanuel Vadot+----------------+ +-------------+ 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel VadotRequired properties: 15*c66ec88fSEmmanuel Vadot- compatible: Should be "hisilicon,hi655x-pmic". 16*c66ec88fSEmmanuel Vadot- reg: Base address of PMIC on Hi6220 SoC. 17*c66ec88fSEmmanuel Vadot- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). 18*c66ec88fSEmmanuel Vadot- pmic-gpios: The GPIO used by PMIC IRQ. 19*c66ec88fSEmmanuel Vadot- #clock-cells: From common clock binding; shall be set to 0 20*c66ec88fSEmmanuel Vadot 21*c66ec88fSEmmanuel VadotOptional properties: 22*c66ec88fSEmmanuel Vadot- clock-output-names: From common clock binding to override the 23*c66ec88fSEmmanuel Vadot default output clock name 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel VadotExample: 26*c66ec88fSEmmanuel Vadot pmic: pmic@f8000000 { 27*c66ec88fSEmmanuel Vadot compatible = "hisilicon,hi655x-pmic"; 28*c66ec88fSEmmanuel Vadot reg = <0x0 0xf8000000 0x0 0x1000>; 29*c66ec88fSEmmanuel Vadot interrupt-controller; 30*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 31*c66ec88fSEmmanuel Vadot pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 32*c66ec88fSEmmanuel Vadot #clock-cells = <0>; 33*c66ec88fSEmmanuel Vadot } 34