xref: /freebsd/sys/contrib/device-tree/Bindings/mfd/allwinner,sun6i-a31-prcm.yaml (revision 924226fba12cc9a228c73b956e1b7fa24c60b055) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/allwinner,sun6i-a31-prcm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A31 PRCM Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13deprecated: true
14
15properties:
16  compatible:
17    const: allwinner,sun6i-a31-prcm
18
19  reg:
20    maxItems: 1
21
22patternProperties:
23  "^.*_(clk|rst)$":
24    type: object
25
26    properties:
27      compatible:
28        enum:
29          - allwinner,sun4i-a10-mod0-clk
30          - allwinner,sun6i-a31-apb0-clk
31          - allwinner,sun6i-a31-apb0-gates-clk
32          - allwinner,sun6i-a31-ar100-clk
33          - allwinner,sun6i-a31-clock-reset
34          - fixed-factor-clock
35
36    allOf:
37      - if:
38          properties:
39            compatible:
40              contains:
41                const: allwinner,sun6i-a31-apb0-clk
42
43        then:
44          properties:
45            "#clock-cells":
46              const: 0
47
48            # Already checked in the main schema
49            compatible: true
50
51            clocks:
52              maxItems: 1
53
54            clock-output-names:
55              maxItems: 1
56
57            phandle: true
58
59          required:
60            - "#clock-cells"
61            - compatible
62            - clocks
63            - clock-output-names
64
65          additionalProperties: false
66
67      - if:
68          properties:
69            compatible:
70              contains:
71                const: allwinner,sun6i-a31-apb0-gates-clk
72
73        then:
74          properties:
75            "#clock-cells":
76              const: 1
77              description: >
78                This additional argument passed to that clock is the
79                offset of the bit controlling this particular gate in
80                the register.
81
82            # Already checked in the main schema
83            compatible: true
84
85            clocks:
86              maxItems: 1
87
88            clock-output-names:
89              minItems: 1
90              maxItems: 32
91
92            phandle: true
93
94          required:
95            - "#clock-cells"
96            - compatible
97            - clocks
98            - clock-output-names
99
100          additionalProperties: false
101
102      - if:
103          properties:
104            compatible:
105              contains:
106                const: allwinner,sun6i-a31-ar100-clk
107
108        then:
109          properties:
110            "#clock-cells":
111              const: 0
112
113            # Already checked in the main schema
114            compatible: true
115
116            clocks:
117              maxItems: 4
118              description: >
119                The parent order must match the hardware programming
120                order.
121
122            clock-output-names:
123              maxItems: 1
124
125            phandle: true
126
127          required:
128            - "#clock-cells"
129            - compatible
130            - clocks
131            - clock-output-names
132
133          additionalProperties: false
134
135      - if:
136          properties:
137            compatible:
138              contains:
139                const: allwinner,sun6i-a31-clock-reset
140
141        then:
142          properties:
143            "#reset-cells":
144              const: 1
145
146            # Already checked in the main schema
147            compatible: true
148
149            phandle: true
150
151          required:
152            - "#reset-cells"
153            - compatible
154
155          additionalProperties: false
156
157required:
158  - compatible
159  - reg
160
161additionalProperties: false
162
163examples:
164  - |
165    #include <dt-bindings/clock/sun6i-a31-ccu.h>
166
167    prcm@1f01400 {
168        compatible = "allwinner,sun6i-a31-prcm";
169        reg = <0x01f01400 0x200>;
170
171        ar100: ar100_clk {
172            compatible = "allwinner,sun6i-a31-ar100-clk";
173            #clock-cells = <0>;
174            clocks = <&rtc 0>, <&osc24M>,
175                     <&ccu CLK_PLL_PERIPH>,
176                     <&ccu CLK_PLL_PERIPH>;
177            clock-output-names = "ar100";
178        };
179
180        ahb0: ahb0_clk {
181            compatible = "fixed-factor-clock";
182            #clock-cells = <0>;
183            clock-div = <1>;
184            clock-mult = <1>;
185            clocks = <&ar100>;
186            clock-output-names = "ahb0";
187        };
188
189        apb0: apb0_clk {
190            compatible = "allwinner,sun6i-a31-apb0-clk";
191            #clock-cells = <0>;
192            clocks = <&ahb0>;
193            clock-output-names = "apb0";
194        };
195
196        apb0_gates: apb0_gates_clk {
197            compatible = "allwinner,sun6i-a31-apb0-gates-clk";
198            #clock-cells = <1>;
199            clocks = <&apb0>;
200            clock-output-names = "apb0_pio", "apb0_ir",
201                                 "apb0_timer", "apb0_p2wi",
202                                 "apb0_uart", "apb0_1wire",
203                                 "apb0_i2c";
204        };
205
206        ir_clk: ir_clk {
207            #clock-cells = <0>;
208            compatible = "allwinner,sun4i-a10-mod0-clk";
209            clocks = <&rtc 0>, <&osc24M>;
210            clock-output-names = "ir";
211        };
212
213        apb0_rst: apb0_rst {
214            compatible = "allwinner,sun6i-a31-clock-reset";
215            #reset-cells = <1>;
216        };
217    };
218
219...
220