1Device tree bindings for ARM PL353 static memory controller 2 3PL353 static memory controller supports two kinds of memory 4interfaces.i.e NAND and SRAM/NOR interfaces. 5The actual devices are instantiated from the child nodes of pl353 smc node. 6 7Required properties: 8- compatible : Should be "arm,pl353-smc-r2p1", "arm,primecell". 9- reg : Controller registers map and length. 10- clock-names : List of input clock names - "memclk", "apb_pclk" 11 (See clock bindings for details). 12- clocks : Clock phandles (see clock bindings for details). 13- address-cells : Must be 2. 14- size-cells : Must be 1. 15 16Child nodes: 17 For NAND the "arm,pl353-nand-r2p1" and for NOR the "cfi-flash" drivers are 18supported as child nodes. 19 20for NAND partition information please refer the below file 21Documentation/devicetree/bindings/mtd/partition.txt 22 23Example: 24 smcc: memory-controller@e000e000 25 compatible = "arm,pl353-smc-r2p1", "arm,primecell"; 26 clock-names = "memclk", "apb_pclk"; 27 clocks = <&clkc 11>, <&clkc 44>; 28 reg = <0xe000e000 0x1000>; 29 #address-cells = <2>; 30 #size-cells = <1>; 31 ranges = <0x0 0x0 0xe1000000 0x1000000 //Nand CS Region 32 0x1 0x0 0xe2000000 0x2000000 //SRAM/NOR CS Region 33 0x2 0x0 0xe4000000 0x2000000>; //SRAM/NOR CS Region 34 nand_0: flash@e1000000 { 35 compatible = "arm,pl353-nand-r2p1" 36 reg = <0 0 0x1000000>; 37 (...) 38 }; 39 nor0: flash@e2000000 { 40 compatible = "cfi-flash"; 41 reg = <1 0 0x2000000>; 42 }; 43 nor1: flash@e4000000 { 44 compatible = "cfi-flash"; 45 reg = <2 0 0x2000000>; 46 }; 47 }; 48