1Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor with embedded SoC ISP 2-------------------------------------------------------------------- 3 4Required properties: 5 6- compatible : "samsung,s5k5baf"; 7- reg : I2C slave address of the sensor; 8- vdda-supply : analog power supply 2.8V (2.6V to 3.0V); 9- vddreg-supply : regulator input power supply 1.8V (1.7V to 1.9V) 10 or 2.8V (2.6V to 3.0); 11- vddio-supply : I/O power supply 1.8V (1.65V to 1.95V) 12 or 2.8V (2.5V to 3.1V); 13- stbyn-gpios : GPIO connected to STDBYN pin; 14- rstn-gpios : GPIO connected to RSTN pin; 15- clocks : list of phandle and clock specifier pairs 16 according to common clock bindings for the 17 clocks described in clock-names; 18- clock-names : should include "mclk" for the sensor's master clock; 19 20Optional properties: 21 22- clock-frequency : the frequency at which the "mclk" clock should be 23 configured to operate, in Hz; if this property is not 24 specified default 24 MHz value will be used. 25 26The device node should contain one 'port' child node with one child 'endpoint' 27node, according to the bindings defined in Documentation/devicetree/bindings/ 28media/video-interfaces.txt. The following are properties specific to those 29nodes. 30 31endpoint node 32------------- 33 34- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in 35 video-interfaces.txt. If present it should be <1> - the device 36 supports only one data lane without re-mapping. 37 38Example: 39 40s5k5bafx@2d { 41 compatible = "samsung,s5k5baf"; 42 reg = <0x2d>; 43 vdda-supply = <&cam_io_en_reg>; 44 vddreg-supply = <&vt_core_15v_reg>; 45 vddio-supply = <&vtcam_reg>; 46 stbyn-gpios = <&gpl2 0 1>; 47 rstn-gpios = <&gpl2 1 1>; 48 clock-names = "mclk"; 49 clocks = <&clock_cam 0>; 50 clock-frequency = <24000000>; 51 52 port { 53 s5k5bafx_ep: endpoint { 54 remote-endpoint = <&csis1_ep>; 55 data-lanes = <1>; 56 }; 57 }; 58}; 59