xref: /freebsd/sys/contrib/device-tree/Bindings/media/rockchip-vpu.yaml (revision d0b2dbfa0ecf2bbc9709efc5e20baf8e4b44bbbf) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Hantro G1 VPU codecs implemented on Rockchip SoCs
9
10maintainers:
11  - Ezequiel Garcia <ezequiel@collabora.com>
12
13description:
14  Hantro G1 video encode and decode accelerators present on Rockchip SoCs.
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - rockchip,rk3036-vpu
21          - rockchip,rk3066-vpu
22          - rockchip,rk3288-vpu
23          - rockchip,rk3328-vpu
24          - rockchip,rk3399-vpu
25          - rockchip,px30-vpu
26          - rockchip,rk3568-vpu
27      - items:
28          - const: rockchip,rk3188-vpu
29          - const: rockchip,rk3066-vpu
30      - items:
31          - const: rockchip,rk3228-vpu
32          - const: rockchip,rk3399-vpu
33
34  reg:
35    maxItems: 1
36
37  interrupts:
38    minItems: 1
39    maxItems: 2
40
41  interrupt-names:
42    oneOf:
43      - const: vdpu
44      - items:
45          - const: vepu
46          - const: vdpu
47
48  clocks:
49    oneOf:
50      - maxItems: 2
51      - maxItems: 4
52
53  clock-names:
54    oneOf:
55      - items:
56          - const: aclk
57          - const: hclk
58      - items:
59          - const: aclk_vdpu
60          - const: hclk_vdpu
61          - const: aclk_vepu
62          - const: hclk_vepu
63
64  power-domains:
65    maxItems: 1
66
67  iommus:
68    maxItems: 1
69
70required:
71  - compatible
72  - reg
73  - interrupts
74  - interrupt-names
75  - clocks
76  - clock-names
77
78additionalProperties: false
79
80examples:
81  - |
82        #include <dt-bindings/clock/rk3288-cru.h>
83        #include <dt-bindings/interrupt-controller/arm-gic.h>
84        #include <dt-bindings/power/rk3288-power.h>
85
86        vpu: video-codec@ff9a0000 {
87                compatible = "rockchip,rk3288-vpu";
88                reg = <0xff9a0000 0x800>;
89                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
90                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
91                interrupt-names = "vepu", "vdpu";
92                clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
93                clock-names = "aclk", "hclk";
94                power-domains = <&power RK3288_PD_VIDEO>;
95                iommus = <&vpu_mmu>;
96        };
97