1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SDM845 Venus v2 video encode and decode accelerators 8 9maintainers: 10 - Stanimir Varbanov <stanimir.varbanov@linaro.org> 11 12description: | 13 The Venus IP is a video encode and decode accelerator present 14 on Qualcomm platforms 15 16allOf: 17 - $ref: qcom,venus-common.yaml# 18 19properties: 20 compatible: 21 const: qcom,sdm845-venus-v2 22 23 power-domains: 24 minItems: 3 25 maxItems: 4 26 27 power-domain-names: 28 minItems: 3 29 items: 30 - const: venus 31 - const: vcodec0 32 - const: vcodec1 33 - const: cx 34 35 clocks: 36 maxItems: 7 37 38 clock-names: 39 items: 40 - const: core 41 - const: iface 42 - const: bus 43 - const: vcodec0_core 44 - const: vcodec0_bus 45 - const: vcodec1_core 46 - const: vcodec1_bus 47 48 iommus: 49 maxItems: 2 50 51 interconnects: 52 maxItems: 2 53 54 interconnect-names: 55 items: 56 - const: video-mem 57 - const: cpu-cfg 58 59 operating-points-v2: true 60 opp-table: 61 type: object 62 63 video-core0: 64 type: object 65 66 properties: 67 compatible: 68 const: venus-decoder 69 70 required: 71 - compatible 72 73 additionalProperties: false 74 75 video-core1: 76 type: object 77 78 properties: 79 compatible: 80 const: venus-encoder 81 82 required: 83 - compatible 84 85 additionalProperties: false 86 87required: 88 - compatible 89 - power-domain-names 90 - iommus 91 - video-core0 92 - video-core1 93 94unevaluatedProperties: false 95 96examples: 97 - | 98 #include <dt-bindings/interrupt-controller/arm-gic.h> 99 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 100 101 video-codec@aa00000 { 102 compatible = "qcom,sdm845-venus-v2"; 103 reg = <0x0aa00000 0xff000>; 104 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 105 clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, 106 <&videocc VIDEO_CC_VENUS_AHB_CLK>, 107 <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, 108 <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, 109 <&videocc VIDEO_CC_VCODEC0_AXI_CLK>, 110 <&videocc VIDEO_CC_VCODEC1_CORE_CLK>, 111 <&videocc VIDEO_CC_VCODEC1_AXI_CLK>; 112 clock-names = "core", "iface", "bus", 113 "vcodec0_core", "vcodec0_bus", 114 "vcodec1_core", "vcodec1_bus"; 115 power-domains = <&videocc VENUS_GDSC>, 116 <&videocc VCODEC0_GDSC>, 117 <&videocc VCODEC1_GDSC>; 118 power-domain-names = "venus", "vcodec0", "vcodec1"; 119 iommus = <&apps_smmu 0x10a0 0x8>, 120 <&apps_smmu 0x10b0 0x0>; 121 memory-region = <&venus_mem>; 122 123 video-core0 { 124 compatible = "venus-decoder"; 125 }; 126 127 video-core1 { 128 compatible = "venus-encoder"; 129 }; 130 }; 131