xref: /freebsd/sys/contrib/device-tree/Bindings/media/mediatek,mdp3-tcc.yaml (revision ae5de77ed78ae54d86cead5604869212e8008e6b)
18d13bc63SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28d13bc63SEmmanuel Vadot%YAML 1.2
38d13bc63SEmmanuel Vadot---
48d13bc63SEmmanuel Vadot$id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml#
58d13bc63SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
68d13bc63SEmmanuel Vadot
78d13bc63SEmmanuel Vadottitle: MediaTek Media Data Path 3 Tone Curve Conversion
88d13bc63SEmmanuel Vadot
98d13bc63SEmmanuel Vadotmaintainers:
108d13bc63SEmmanuel Vadot  - Matthias Brugger <matthias.bgg@gmail.com>
118d13bc63SEmmanuel Vadot
128d13bc63SEmmanuel Vadotdescription:
138d13bc63SEmmanuel Vadot  Tone Curve Conversion (TCC) is one of Media Profile Path 3 (MDP3) components.
148d13bc63SEmmanuel Vadot  It is used to handle the tone mapping of various gamma curves in order to
158d13bc63SEmmanuel Vadot  achieve HDR10 effects. This helps adapt the content to the color and
168d13bc63SEmmanuel Vadot  brightness range that standard display devices typically support.
178d13bc63SEmmanuel Vadot
188d13bc63SEmmanuel Vadotproperties:
198d13bc63SEmmanuel Vadot  compatible:
20*ae5de77eSEmmanuel Vadot    oneOf:
21*ae5de77eSEmmanuel Vadot      - enum:
228d13bc63SEmmanuel Vadot          - mediatek,mt8195-mdp3-tcc
23*ae5de77eSEmmanuel Vadot      - items:
24*ae5de77eSEmmanuel Vadot          - const: mediatek,mt8188-mdp3-tcc
25*ae5de77eSEmmanuel Vadot          - const: mediatek,mt8195-mdp3-tcc
268d13bc63SEmmanuel Vadot
278d13bc63SEmmanuel Vadot  reg:
288d13bc63SEmmanuel Vadot    maxItems: 1
298d13bc63SEmmanuel Vadot
308d13bc63SEmmanuel Vadot  mediatek,gce-client-reg:
318d13bc63SEmmanuel Vadot    description:
328d13bc63SEmmanuel Vadot      The register of display function block to be set by gce. There are 4 arguments,
338d13bc63SEmmanuel Vadot      such as gce node, subsys id, offset and register size. The subsys id that is
348d13bc63SEmmanuel Vadot      mapping to the register of display function blocks is defined in the gce header
358d13bc63SEmmanuel Vadot      include/dt-bindings/gce/<chip>-gce.h of each chips.
368d13bc63SEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/phandle-array
378d13bc63SEmmanuel Vadot    items:
388d13bc63SEmmanuel Vadot      items:
398d13bc63SEmmanuel Vadot        - description: phandle of GCE
408d13bc63SEmmanuel Vadot        - description: GCE subsys id
418d13bc63SEmmanuel Vadot        - description: register offset
428d13bc63SEmmanuel Vadot        - description: register size
438d13bc63SEmmanuel Vadot    maxItems: 1
448d13bc63SEmmanuel Vadot
458d13bc63SEmmanuel Vadot  clocks:
468d13bc63SEmmanuel Vadot    maxItems: 1
478d13bc63SEmmanuel Vadot
488d13bc63SEmmanuel Vadotrequired:
498d13bc63SEmmanuel Vadot  - compatible
508d13bc63SEmmanuel Vadot  - reg
518d13bc63SEmmanuel Vadot  - mediatek,gce-client-reg
528d13bc63SEmmanuel Vadot  - clocks
538d13bc63SEmmanuel Vadot
548d13bc63SEmmanuel VadotadditionalProperties: false
558d13bc63SEmmanuel Vadot
568d13bc63SEmmanuel Vadotexamples:
578d13bc63SEmmanuel Vadot  - |
588d13bc63SEmmanuel Vadot    #include <dt-bindings/clock/mt8195-clk.h>
598d13bc63SEmmanuel Vadot    #include <dt-bindings/gce/mt8195-gce.h>
608d13bc63SEmmanuel Vadot
618d13bc63SEmmanuel Vadot    display@1400b000 {
628d13bc63SEmmanuel Vadot        compatible = "mediatek,mt8195-mdp3-tcc";
638d13bc63SEmmanuel Vadot        reg = <0x1400b000 0x1000>;
648d13bc63SEmmanuel Vadot        mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
658d13bc63SEmmanuel Vadot        clocks = <&vppsys0 CLK_VPP0_MDP_TCC>;
668d13bc63SEmmanuel Vadot    };
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