1* Analog Devices ADV748X video decoder with HDMI receiver 2 3The ADV7481 and ADV7482 are multi format video decoders with an integrated 4HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB 5from three input sources HDMI, analog and TTL. 6 7Required Properties: 8 9 - compatible: Must contain one of the following 10 - "adi,adv7481" for the ADV7481 11 - "adi,adv7482" for the ADV7482 12 13 - reg: I2C slave addresses 14 The ADV748x has up to twelve 256-byte maps that can be accessed via the 15 main I2C ports. Each map has it own I2C address and acts as a standard 16 slave device on the I2C bus. The main address is mandatory, others are 17 optional and remain at default values if not specified. 18 19Optional Properties: 20 21 - interrupt-names: Should specify the interrupts as "intrq1", "intrq2" and/or 22 "intrq3". All interrupts are optional. The "intrq3" interrupt 23 is only available on the adv7481 24 - interrupts: Specify the interrupt lines for the ADV748x 25 - reg-names : Names of maps with programmable addresses. 26 It shall contain all maps needing a non-default address. 27 Possible map names are: 28 "main", "dpll", "cp", "hdmi", "edid", "repeater", 29 "infoframe", "cbus", "cec", "sdp", "txa", "txb" 30 31The device node must contain one 'port' child node per device input and output 32port, in accordance with the video interface bindings defined in 33Documentation/devicetree/bindings/media/video-interfaces.txt. The port nodes 34are numbered as follows. 35 36 Name Type Port 37 --------------------------------------- 38 AIN0 sink 0 39 AIN1 sink 1 40 AIN2 sink 2 41 AIN3 sink 3 42 AIN4 sink 4 43 AIN5 sink 5 44 AIN6 sink 6 45 AIN7 sink 7 46 HDMI sink 8 47 TTL sink 9 48 TXA source 10 49 TXB source 11 50 51The digital output port nodes, when present, shall contain at least one 52endpoint. Each of those endpoints shall contain the data-lanes property as 53described in video-interfaces.txt. 54 55Required source endpoint properties: 56 - data-lanes: an array of physical data lane indexes 57 The accepted value(s) for this property depends on which of the two 58 sources are described. For TXA 1, 2 or 4 data lanes can be described 59 while for TXB only 1 data lane is valid. See video-interfaces.txt 60 for detailed description. 61 62Ports are optional if they are not connected to anything at the hardware level. 63 64Example: 65 66 video-receiver@70 { 67 compatible = "adi,adv7482"; 68 reg = <0x70 0x71 0x72 0x73 0x74 0x75 69 0x60 0x61 0x62 0x63 0x64 0x65>; 70 reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", 71 "infoframe", "cbus", "cec", "sdp", "txa", "txb"; 72 73 #address-cells = <1>; 74 #size-cells = <0>; 75 76 interrupt-parent = <&gpio6>; 77 interrupt-names = "intrq1", "intrq2"; 78 interrupts = <30 IRQ_TYPE_LEVEL_LOW>, 79 <31 IRQ_TYPE_LEVEL_LOW>; 80 81 port@7 { 82 reg = <7>; 83 84 adv7482_ain7: endpoint { 85 remote-endpoint = <&cvbs_in>; 86 }; 87 }; 88 89 port@8 { 90 reg = <8>; 91 92 adv7482_hdmi: endpoint { 93 remote-endpoint = <&hdmi_in>; 94 }; 95 }; 96 97 port@a { 98 reg = <10>; 99 100 adv7482_txa: endpoint { 101 clock-lanes = <0>; 102 data-lanes = <1 2 3 4>; 103 remote-endpoint = <&csi40_in>; 104 }; 105 }; 106 107 port@b { 108 reg = <11>; 109 110 adv7482_txb: endpoint { 111 clock-lanes = <0>; 112 data-lanes = <1>; 113 remote-endpoint = <&csi20_in>; 114 }; 115 }; 116 }; 117