1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-video-engine.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner A10 Video Engine Device Tree Bindings 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 12 13properties: 14 compatible: 15 enum: 16 - allwinner,sun4i-a10-video-engine 17 - allwinner,sun5i-a13-video-engine 18 - allwinner,sun7i-a20-video-engine 19 - allwinner,sun8i-a33-video-engine 20 - allwinner,sun8i-h3-video-engine 21 - allwinner,sun8i-v3s-video-engine 22 - allwinner,sun8i-r40-video-engine 23 - allwinner,sun20i-d1-video-engine 24 - allwinner,sun50i-a64-video-engine 25 - allwinner,sun50i-h5-video-engine 26 - allwinner,sun50i-h6-video-engine 27 28 reg: 29 maxItems: 1 30 31 interrupts: 32 maxItems: 1 33 34 clocks: 35 items: 36 - description: Bus Clock 37 - description: Module Clock 38 - description: RAM Clock 39 40 clock-names: 41 items: 42 - const: ahb 43 - const: mod 44 - const: ram 45 46 resets: 47 maxItems: 1 48 49 allwinner,sram: 50 $ref: /schemas/types.yaml#/definitions/phandle-array 51 description: Phandle to the device SRAM 52 53 iommus: 54 maxItems: 1 55 56 memory-region: 57 maxItems: 1 58 description: 59 CMA pool to use for buffers allocation instead of the default 60 CMA pool. 61 62required: 63 - compatible 64 - reg 65 - interrupts 66 - clocks 67 - clock-names 68 - resets 69 - allwinner,sram 70 71additionalProperties: false 72 73examples: 74 - | 75 #include <dt-bindings/interrupt-controller/arm-gic.h> 76 #include <dt-bindings/clock/sun7i-a20-ccu.h> 77 #include <dt-bindings/reset/sun4i-a10-ccu.h> 78 79 video-codec@1c0e000 { 80 compatible = "allwinner,sun7i-a20-video-engine"; 81 reg = <0x01c0e000 0x1000>; 82 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 83 clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, 84 <&ccu CLK_DRAM_VE>; 85 clock-names = "ahb", "mod", "ram"; 86 resets = <&ccu RST_VE>; 87 allwinner,sram = <&ve_sram 1>; 88 }; 89 90... 91