xref: /freebsd/sys/contrib/device-tree/Bindings/media/allwinner,sun4i-a10-video-engine.yaml (revision 3ff01b231dfa83d518854c63e7c9cd1debd1139e) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-video-engine.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 Video Engine Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  compatible:
15    enum:
16      - allwinner,sun4i-a10-video-engine
17      - allwinner,sun5i-a13-video-engine
18      - allwinner,sun7i-a20-video-engine
19      - allwinner,sun8i-a33-video-engine
20      - allwinner,sun8i-h3-video-engine
21      - allwinner,sun50i-a64-video-engine
22      - allwinner,sun50i-h5-video-engine
23      - allwinner,sun50i-h6-video-engine
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    maxItems: 1
30
31  clocks:
32    items:
33      - description: Bus Clock
34      - description: Module Clock
35      - description: RAM Clock
36
37  clock-names:
38    items:
39      - const: ahb
40      - const: mod
41      - const: ram
42
43  resets:
44    maxItems: 1
45
46  allwinner,sram:
47    $ref: /schemas/types.yaml#/definitions/phandle-array
48    description: Phandle to the device SRAM
49
50  iommus:
51    maxItems: 1
52
53  memory-region:
54    description:
55      CMA pool to use for buffers allocation instead of the default
56      CMA pool.
57
58required:
59  - compatible
60  - reg
61  - interrupts
62  - clocks
63  - clock-names
64  - resets
65  - allwinner,sram
66
67additionalProperties: false
68
69examples:
70  - |
71    #include <dt-bindings/interrupt-controller/arm-gic.h>
72    #include <dt-bindings/clock/sun7i-a20-ccu.h>
73    #include <dt-bindings/reset/sun4i-a10-ccu.h>
74
75    video-codec@1c0e000 {
76        compatible = "allwinner,sun7i-a20-video-engine";
77        reg = <0x01c0e000 0x1000>;
78        interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
79        clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
80                 <&ccu CLK_DRAM_VE>;
81        clock-names = "ahb", "mod", "ram";
82        resets = <&ccu RST_VE>;
83        allwinner,sram = <&ve_sram 1>;
84    };
85
86...
87