xref: /freebsd/sys/contrib/device-tree/Bindings/mailbox/nvidia,tegra186-hsp.yaml (revision d4eeb02986980bf33dd56c41ceb9fc5f180c0d47) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra Hardware Synchronization Primitives (HSP)
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Jon Hunter <jonathanh@nvidia.com>
12
13description: |
14  The HSP modules are used for the processors to share resources and
15  communicate together. It provides a set of hardware synchronization
16  primitives for interprocessor communication. So the interprocessor
17  communication (IPC) protocols can use hardware synchronization
18  primitives, when operating between two processors not in an SMP
19  relationship.
20
21  The features that HSP supported are shared mailboxes, shared
22  semaphores, arbitrated semaphores and doorbells.
23
24  The mbox specifier of the "mboxes" property in the client node should
25  contain two cells. The first cell determines the HSP type and the
26  second cell is used to identify the mailbox that the client is going
27  to use.
28
29  For doorbells, the second cell specifies the index of the doorbell to
30  use.
31
32  For shared mailboxes, the second cell is composed of two fields:
33    - bits 31..24:
34        A bit mask of flags that further specify how the shared mailbox
35        will be used. Valid flags are:
36          - bit 31:
37              Defines the direction of the mailbox. If set, the mailbox
38              will be used as a producer (i.e. used to send data). If
39              cleared, the mailbox is the consumer of data sent by a
40              producer.
41
42    - bits 23..0:
43        The index of the shared mailbox to use. The number of available
44        mailboxes may vary by instance of the HSP block and SoC
45        generation.
46
47    The following file contains definitions that can be used to
48    construct mailbox specifiers:
49
50        <dt-bindings/mailbox/tegra186-hsp.h>
51
52properties:
53  $nodename:
54    pattern: "^hsp@[0-9a-f]+$"
55
56  compatible:
57    oneOf:
58      - const: nvidia,tegra186-hsp
59      - const: nvidia,tegra194-hsp
60      - items:
61          - const: nvidia,tegra234-hsp
62          - const: nvidia,tegra194-hsp
63
64  reg:
65    maxItems: 1
66
67  interrupts:
68    minItems: 1
69    maxItems: 9
70
71  interrupt-names:
72    oneOf:
73      # shared interrupts are optional
74      - items:
75          - const: doorbell
76
77      - items:
78          - const: doorbell
79          - pattern: "^shared[0-7]$"
80          - pattern: "^shared[0-7]$"
81          - pattern: "^shared[0-7]$"
82          - pattern: "^shared[0-7]$"
83          - pattern: "^shared[0-7]$"
84          - pattern: "^shared[0-7]$"
85          - pattern: "^shared[0-7]$"
86          - pattern: "^shared[0-7]$"
87
88      - items:
89          - pattern: "^shared[0-7]$"
90          - pattern: "^shared[0-7]$"
91          - pattern: "^shared[0-7]$"
92          - pattern: "^shared[0-7]$"
93
94  "#mbox-cells":
95    const: 2
96
97additionalProperties: false
98
99examples:
100  - |
101    #include <dt-bindings/interrupt-controller/arm-gic.h>
102    #include <dt-bindings/mailbox/tegra186-hsp.h>
103
104    hsp_top0: hsp@3c00000 {
105        compatible = "nvidia,tegra186-hsp";
106        reg = <0x03c00000 0xa0000>;
107        interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
108        interrupt-names = "doorbell";
109        #mbox-cells = <2>;
110    };
111
112    client {
113        mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_CCPLEX>;
114    };
115