xref: /freebsd/sys/contrib/device-tree/Bindings/mailbox/mtk-gce.txt (revision bdd1243df58e60e85101c09001d9812a789b6bc4)
1MediaTek GCE
2===============
3
4The Global Command Engine (GCE) is used to help read/write registers with
5critical time limitation, such as updating display configuration during the
6vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
7
8CMDQ driver uses mailbox framework for communication. Please refer to
9mailbox.txt for generic information about mailbox device-tree bindings.
10
11Required properties:
12- compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce",
13  "mediatek,mt8186-gce", "mediatek,mt8192-gce", "mediatek,mt8195-gce" or
14  "mediatek,mt6779-gce".
15- reg: Address range of the GCE unit
16- interrupts: The interrupt signal from the GCE block
17- clock: Clocks according to the common clock binding
18- clock-names: Must be "gce" to stand for GCE clock
19- #mbox-cells: Should be 2.
20	<&phandle channel priority>
21	phandle: Label name of a gce node.
22	channel: Channel of mailbox. Be equal to the thread id of GCE.
23	priority: Priority of GCE thread.
24
25Required properties for a client device:
26- mboxes: Client use mailbox to communicate with GCE, it should have this
27  property and list of phandle, mailbox specifiers.
28Optional properties for a client device:
29- mediatek,gce-client-reg: Specify the sub-system id which is corresponding
30  to the register address, it should have this property and list of phandle,
31  sub-system specifiers.
32  <&phandle subsys_number start_offset size>
33  phandle: Label name of a gce node.
34  subsys_number: specify the sub-system id which is corresponding
35                 to the register address.
36  start_offset: the start offset of register address that GCE can access.
37  size: the total size of register address that GCE can access.
38
39Optional properties for a client mutex node:
40- mediatek,gce-events: GCE events used by clients. The event numbers are
41  defined in 'dt-bindings/gce/<chip>-gce.h'.
42
43Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h',
44'dt-bindings/gce/mt8183-gce.h', 'dt-bindings/gce/mt8186-gce.h'
45'dt-bindings/gce/mt8192-gce.h', 'dt-bindings/gce/mt8195-gce.h' or
46'dt-bindings/gce/mt6779-gce.h'.
47Such as sub-system ids, thread priority, event ids.
48
49Example:
50
51	gce: gce@10212000 {
52		compatible = "mediatek,mt8173-gce";
53		reg = <0 0x10212000 0 0x1000>;
54		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
55		clocks = <&infracfg CLK_INFRA_GCE>;
56		clock-names = "gce";
57		#mbox-cells = <2>;
58	};
59
60Example for a client device:
61
62	mmsys: clock-controller@14000000 {
63		compatible = "mediatek,mt8173-mmsys";
64		mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST>,
65			 <&gce 1 CMDQ_THR_PRIO_LOWEST>;
66		mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF
67				CMDQ_EVENT_MUTEX1_STREAM_EOF>;
68		mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>,
69					  <&gce SUBSYS_1401XXXX 0x2000 0x100>;
70		...
71	};
72
73Example for a client mutex node:
74	mutex: mutex@14020000 {
75		compatible = "mediatek,mt8173-disp-mutex";
76		reg = <0 0x14020000 0 0x1000>;
77		interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>;
78		power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
79		clocks = <&mmsys CLK_MM_MUTEX_32K>;
80		mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>,
81				      <CMDQ_EVENT_MUTEX1_STREAM_EOF>;
82	};
83