xref: /freebsd/sys/contrib/device-tree/Bindings/mailbox/mtk,adsp-mbox.yaml (revision d5b0e70f7e04d971691517ce1304d86a1e367e2e)
1c9ccf3a3SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2c9ccf3a3SEmmanuel Vadot%YAML 1.2
3c9ccf3a3SEmmanuel Vadot---
4c9ccf3a3SEmmanuel Vadot$id: http://devicetree.org/schemas/mailbox/mtk,adsp-mbox.yaml#
5c9ccf3a3SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6c9ccf3a3SEmmanuel Vadot
7c9ccf3a3SEmmanuel Vadottitle: Mediatek ADSP mailbox
8c9ccf3a3SEmmanuel Vadot
9c9ccf3a3SEmmanuel Vadotmaintainers:
10c9ccf3a3SEmmanuel Vadot  - Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
11c9ccf3a3SEmmanuel Vadot
12c9ccf3a3SEmmanuel Vadotdescription: |
13c9ccf3a3SEmmanuel Vadot  The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC
14*d5b0e70fSEmmanuel Vadot  to communicate with ADSP by passing messages through two mailbox channels.
15c9ccf3a3SEmmanuel Vadot  The MTK ADSP mailbox IPC also provides the ability for one processor to
16c9ccf3a3SEmmanuel Vadot  signal the other processor using interrupts.
17c9ccf3a3SEmmanuel Vadot
18c9ccf3a3SEmmanuel Vadotproperties:
19c9ccf3a3SEmmanuel Vadot  compatible:
20*d5b0e70fSEmmanuel Vadot    enum:
21*d5b0e70fSEmmanuel Vadot      - mediatek,mt8195-adsp-mbox
22*d5b0e70fSEmmanuel Vadot      - mediatek,mt8186-adsp-mbox
23c9ccf3a3SEmmanuel Vadot
24c9ccf3a3SEmmanuel Vadot  "#mbox-cells":
25c9ccf3a3SEmmanuel Vadot    const: 0
26c9ccf3a3SEmmanuel Vadot
27c9ccf3a3SEmmanuel Vadot  reg:
28c9ccf3a3SEmmanuel Vadot    maxItems: 1
29c9ccf3a3SEmmanuel Vadot
30c9ccf3a3SEmmanuel Vadot  interrupts:
31c9ccf3a3SEmmanuel Vadot    maxItems: 1
32c9ccf3a3SEmmanuel Vadot
33c9ccf3a3SEmmanuel Vadotrequired:
34c9ccf3a3SEmmanuel Vadot  - compatible
35c9ccf3a3SEmmanuel Vadot  - "#mbox-cells"
36c9ccf3a3SEmmanuel Vadot  - reg
37c9ccf3a3SEmmanuel Vadot  - interrupts
38c9ccf3a3SEmmanuel Vadot
39c9ccf3a3SEmmanuel VadotadditionalProperties: false
40c9ccf3a3SEmmanuel Vadot
41c9ccf3a3SEmmanuel Vadotexamples:
42c9ccf3a3SEmmanuel Vadot  - |
43c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/interrupt-controller/arm-gic.h>
44c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/interrupt-controller/irq.h>
45c9ccf3a3SEmmanuel Vadot
46c9ccf3a3SEmmanuel Vadot    adsp_mailbox0:mailbox@10816000 {
47c9ccf3a3SEmmanuel Vadot        compatible = "mediatek,mt8195-adsp-mbox";
48c9ccf3a3SEmmanuel Vadot        #mbox-cells = <0>;
49c9ccf3a3SEmmanuel Vadot        reg = <0x10816000 0x1000>;
50c9ccf3a3SEmmanuel Vadot        interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
51c9ccf3a3SEmmanuel Vadot    };
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