1*c66ec88fSEmmanuel VadotOMAP2+ IOMMU 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible : Should be one of, 5*c66ec88fSEmmanuel Vadot "ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances 6*c66ec88fSEmmanuel Vadot "ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances 7*c66ec88fSEmmanuel Vadot "ti,dra7-dsp-iommu" for DRA7xx DSP IOMMU instances 8*c66ec88fSEmmanuel Vadot "ti,dra7-iommu" for DRA7xx IOMMU instances 9*c66ec88fSEmmanuel Vadot- ti,hwmods : Name of the hwmod associated with the IOMMU instance 10*c66ec88fSEmmanuel Vadot- reg : Address space for the configuration registers 11*c66ec88fSEmmanuel Vadot- interrupts : Interrupt specifier for the IOMMU instance 12*c66ec88fSEmmanuel Vadot- #iommu-cells : Should be 0. OMAP IOMMUs are all "single-master" devices, 13*c66ec88fSEmmanuel Vadot and needs no additional data in the pargs specifier. Please 14*c66ec88fSEmmanuel Vadot also refer to the generic bindings document for more info 15*c66ec88fSEmmanuel Vadot on this property, 16*c66ec88fSEmmanuel Vadot Documentation/devicetree/bindings/iommu/iommu.txt 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel VadotOptional properties: 19*c66ec88fSEmmanuel Vadot- ti,#tlb-entries : Number of entries in the translation look-aside buffer. 20*c66ec88fSEmmanuel Vadot Should be either 8 or 32 (default: 32) 21*c66ec88fSEmmanuel Vadot- ti,iommu-bus-err-back : Indicates the IOMMU instance supports throwing 22*c66ec88fSEmmanuel Vadot back a bus error response on MMU faults. 23*c66ec88fSEmmanuel Vadot- ti,syscon-mmuconfig : Should be a pair of the phandle to the DSP_SYSTEM 24*c66ec88fSEmmanuel Vadot syscon node that contains the additional control 25*c66ec88fSEmmanuel Vadot register for enabling the MMU, and the MMU instance 26*c66ec88fSEmmanuel Vadot number (0-indexed) within the sub-system. This property 27*c66ec88fSEmmanuel Vadot is required for DSP IOMMU instances on DRA7xx SoCs. The 28*c66ec88fSEmmanuel Vadot instance number should be 0 for DSP MDMA MMUs and 1 for 29*c66ec88fSEmmanuel Vadot DSP EDMA MMUs. 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel VadotExample: 32*c66ec88fSEmmanuel Vadot /* OMAP3 ISP MMU */ 33*c66ec88fSEmmanuel Vadot mmu_isp: mmu@480bd400 { 34*c66ec88fSEmmanuel Vadot #iommu-cells = <0>; 35*c66ec88fSEmmanuel Vadot compatible = "ti,omap2-iommu"; 36*c66ec88fSEmmanuel Vadot reg = <0x480bd400 0x80>; 37*c66ec88fSEmmanuel Vadot interrupts = <24>; 38*c66ec88fSEmmanuel Vadot ti,hwmods = "mmu_isp"; 39*c66ec88fSEmmanuel Vadot ti,#tlb-entries = <8>; 40*c66ec88fSEmmanuel Vadot }; 41*c66ec88fSEmmanuel Vadot 42*c66ec88fSEmmanuel Vadot /* DRA74x DSP2 MMUs */ 43*c66ec88fSEmmanuel Vadot mmu0_dsp2: mmu@41501000 { 44*c66ec88fSEmmanuel Vadot compatible = "ti,dra7-dsp-iommu"; 45*c66ec88fSEmmanuel Vadot reg = <0x41501000 0x100>; 46*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 47*c66ec88fSEmmanuel Vadot ti,hwmods = "mmu0_dsp2"; 48*c66ec88fSEmmanuel Vadot #iommu-cells = <0>; 49*c66ec88fSEmmanuel Vadot ti,syscon-mmuconfig = <&dsp2_system 0x0>; 50*c66ec88fSEmmanuel Vadot }; 51*c66ec88fSEmmanuel Vadot 52*c66ec88fSEmmanuel Vadot mmu1_dsp2: mmu@41502000 { 53*c66ec88fSEmmanuel Vadot compatible = "ti,dra7-dsp-iommu"; 54*c66ec88fSEmmanuel Vadot reg = <0x41502000 0x100>; 55*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 56*c66ec88fSEmmanuel Vadot ti,hwmods = "mmu1_dsp2"; 57*c66ec88fSEmmanuel Vadot #iommu-cells = <0>; 58*c66ec88fSEmmanuel Vadot ti,syscon-mmuconfig = <&dsp2_system 0x1>; 59*c66ec88fSEmmanuel Vadot }; 60