15956d97fSEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only 25956d97fSEmmanuel Vadot%YAML 1.2 35956d97fSEmmanuel Vadot--- 45956d97fSEmmanuel Vadot$id: http://devicetree.org/schemas/iommu/rockchip,iommu.yaml# 55956d97fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 65956d97fSEmmanuel Vadot 75956d97fSEmmanuel Vadottitle: Rockchip IOMMU 85956d97fSEmmanuel Vadot 95956d97fSEmmanuel Vadotmaintainers: 105956d97fSEmmanuel Vadot - Heiko Stuebner <heiko@sntech.de> 115956d97fSEmmanuel Vadot 125956d97fSEmmanuel Vadotdescription: |+ 135956d97fSEmmanuel Vadot A Rockchip DRM iommu translates io virtual addresses to physical addresses for 145956d97fSEmmanuel Vadot its master device. Each slave device is bound to a single master device and 155956d97fSEmmanuel Vadot shares its clocks, power domain and irq. 165956d97fSEmmanuel Vadot 175956d97fSEmmanuel Vadot For information on assigning IOMMU controller to its peripheral devices, 185956d97fSEmmanuel Vadot see generic IOMMU bindings. 195956d97fSEmmanuel Vadot 205956d97fSEmmanuel Vadotproperties: 215956d97fSEmmanuel Vadot compatible: 22*8d13bc63SEmmanuel Vadot oneOf: 23*8d13bc63SEmmanuel Vadot - enum: 245956d97fSEmmanuel Vadot - rockchip,iommu 255956d97fSEmmanuel Vadot - rockchip,rk3568-iommu 26*8d13bc63SEmmanuel Vadot - items: 27*8d13bc63SEmmanuel Vadot - enum: 28*8d13bc63SEmmanuel Vadot - rockchip,rk3588-iommu 29*8d13bc63SEmmanuel Vadot - const: rockchip,rk3568-iommu 305956d97fSEmmanuel Vadot 315956d97fSEmmanuel Vadot reg: 325956d97fSEmmanuel Vadot items: 335956d97fSEmmanuel Vadot - description: configuration registers for MMU instance 0 345956d97fSEmmanuel Vadot - description: configuration registers for MMU instance 1 355956d97fSEmmanuel Vadot minItems: 1 365956d97fSEmmanuel Vadot 375956d97fSEmmanuel Vadot interrupts: 385956d97fSEmmanuel Vadot items: 395956d97fSEmmanuel Vadot - description: interruption for MMU instance 0 405956d97fSEmmanuel Vadot - description: interruption for MMU instance 1 415956d97fSEmmanuel Vadot minItems: 1 425956d97fSEmmanuel Vadot 435956d97fSEmmanuel Vadot clocks: 445956d97fSEmmanuel Vadot items: 455956d97fSEmmanuel Vadot - description: Core clock 465956d97fSEmmanuel Vadot - description: Interface clock 475956d97fSEmmanuel Vadot 485956d97fSEmmanuel Vadot clock-names: 495956d97fSEmmanuel Vadot items: 505956d97fSEmmanuel Vadot - const: aclk 515956d97fSEmmanuel Vadot - const: iface 525956d97fSEmmanuel Vadot 535956d97fSEmmanuel Vadot "#iommu-cells": 545956d97fSEmmanuel Vadot const: 0 555956d97fSEmmanuel Vadot 565956d97fSEmmanuel Vadot power-domains: 575956d97fSEmmanuel Vadot maxItems: 1 585956d97fSEmmanuel Vadot 595956d97fSEmmanuel Vadot rockchip,disable-mmu-reset: 605956d97fSEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/flag 615956d97fSEmmanuel Vadot description: | 625956d97fSEmmanuel Vadot Do not use the mmu reset operation. 635956d97fSEmmanuel Vadot Some mmu instances may produce unexpected results 645956d97fSEmmanuel Vadot when the reset operation is used. 655956d97fSEmmanuel Vadot 665956d97fSEmmanuel Vadotrequired: 675956d97fSEmmanuel Vadot - compatible 685956d97fSEmmanuel Vadot - reg 695956d97fSEmmanuel Vadot - interrupts 705956d97fSEmmanuel Vadot - clocks 715956d97fSEmmanuel Vadot - clock-names 725956d97fSEmmanuel Vadot - "#iommu-cells" 735956d97fSEmmanuel Vadot 745956d97fSEmmanuel VadotadditionalProperties: false 755956d97fSEmmanuel Vadot 765956d97fSEmmanuel Vadotexamples: 775956d97fSEmmanuel Vadot - | 785956d97fSEmmanuel Vadot #include <dt-bindings/clock/rk3399-cru.h> 795956d97fSEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 805956d97fSEmmanuel Vadot 815956d97fSEmmanuel Vadot vopl_mmu: iommu@ff940300 { 825956d97fSEmmanuel Vadot compatible = "rockchip,iommu"; 835956d97fSEmmanuel Vadot reg = <0xff940300 0x100>; 845956d97fSEmmanuel Vadot interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 855956d97fSEmmanuel Vadot clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; 865956d97fSEmmanuel Vadot clock-names = "aclk", "iface"; 875956d97fSEmmanuel Vadot #iommu-cells = <0>; 885956d97fSEmmanuel Vadot }; 89