1*7d0873ebSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*7d0873ebSEmmanuel Vadot%YAML 1.2 3*7d0873ebSEmmanuel Vadot--- 4*7d0873ebSEmmanuel Vadot$id: http://devicetree.org/schemas/iommu/qcom,tbu.yaml# 5*7d0873ebSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*7d0873ebSEmmanuel Vadot 7*7d0873ebSEmmanuel Vadottitle: Qualcomm TBU (Translation Buffer Unit) 8*7d0873ebSEmmanuel Vadot 9*7d0873ebSEmmanuel Vadotmaintainers: 10*7d0873ebSEmmanuel Vadot - Georgi Djakov <quic_c_gdjako@quicinc.com> 11*7d0873ebSEmmanuel Vadot 12*7d0873ebSEmmanuel Vadotdescription: 13*7d0873ebSEmmanuel Vadot The Qualcomm SMMU500 implementation consists of TCU and TBU. The TBU contains 14*7d0873ebSEmmanuel Vadot a Translation Lookaside Buffer (TLB) that caches page tables. TBUs provides 15*7d0873ebSEmmanuel Vadot debug features to trace and trigger debug transactions. There are multiple TBU 16*7d0873ebSEmmanuel Vadot instances with each client core. 17*7d0873ebSEmmanuel Vadot 18*7d0873ebSEmmanuel Vadotproperties: 19*7d0873ebSEmmanuel Vadot compatible: 20*7d0873ebSEmmanuel Vadot enum: 21*7d0873ebSEmmanuel Vadot - qcom,sc7280-tbu 22*7d0873ebSEmmanuel Vadot - qcom,sdm845-tbu 23*7d0873ebSEmmanuel Vadot 24*7d0873ebSEmmanuel Vadot reg: 25*7d0873ebSEmmanuel Vadot maxItems: 1 26*7d0873ebSEmmanuel Vadot 27*7d0873ebSEmmanuel Vadot clocks: 28*7d0873ebSEmmanuel Vadot maxItems: 1 29*7d0873ebSEmmanuel Vadot 30*7d0873ebSEmmanuel Vadot interconnects: 31*7d0873ebSEmmanuel Vadot maxItems: 1 32*7d0873ebSEmmanuel Vadot 33*7d0873ebSEmmanuel Vadot power-domains: 34*7d0873ebSEmmanuel Vadot maxItems: 1 35*7d0873ebSEmmanuel Vadot 36*7d0873ebSEmmanuel Vadot qcom,stream-id-range: 37*7d0873ebSEmmanuel Vadot description: | 38*7d0873ebSEmmanuel Vadot Phandle of a SMMU device and Stream ID range (address and size) that 39*7d0873ebSEmmanuel Vadot is assigned by the TBU 40*7d0873ebSEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/phandle-array 41*7d0873ebSEmmanuel Vadot items: 42*7d0873ebSEmmanuel Vadot - items: 43*7d0873ebSEmmanuel Vadot - description: phandle of a smmu node 44*7d0873ebSEmmanuel Vadot - description: stream id base address 45*7d0873ebSEmmanuel Vadot - description: stream id size 46*7d0873ebSEmmanuel Vadot 47*7d0873ebSEmmanuel Vadotrequired: 48*7d0873ebSEmmanuel Vadot - compatible 49*7d0873ebSEmmanuel Vadot - reg 50*7d0873ebSEmmanuel Vadot - qcom,stream-id-range 51*7d0873ebSEmmanuel Vadot 52*7d0873ebSEmmanuel VadotadditionalProperties: false 53*7d0873ebSEmmanuel Vadot 54*7d0873ebSEmmanuel Vadotexamples: 55*7d0873ebSEmmanuel Vadot - | 56*7d0873ebSEmmanuel Vadot #include <dt-bindings/clock/qcom,gcc-sdm845.h> 57*7d0873ebSEmmanuel Vadot #include <dt-bindings/interconnect/qcom,icc.h> 58*7d0873ebSEmmanuel Vadot #include <dt-bindings/interconnect/qcom,sdm845.h> 59*7d0873ebSEmmanuel Vadot 60*7d0873ebSEmmanuel Vadot tbu@150e1000 { 61*7d0873ebSEmmanuel Vadot compatible = "qcom,sdm845-tbu"; 62*7d0873ebSEmmanuel Vadot reg = <0x150e1000 0x1000>; 63*7d0873ebSEmmanuel Vadot clocks = <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; 64*7d0873ebSEmmanuel Vadot interconnects = <&system_noc MASTER_GNOC_SNOC QCOM_ICC_TAG_ACTIVE_ONLY 65*7d0873ebSEmmanuel Vadot &config_noc SLAVE_IMEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; 66*7d0873ebSEmmanuel Vadot power-domains = <&gcc HLOS1_VOTE_AGGRE_NOC_MMU_PCIE_TBU_GDSC>; 67*7d0873ebSEmmanuel Vadot qcom,stream-id-range = <&apps_smmu 0x1c00 0x400>; 68*7d0873ebSEmmanuel Vadot }; 69*7d0873ebSEmmanuel Vadot... 70