1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iommu/apple,dart.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Apple DART IOMMU 8 9maintainers: 10 - Sven Peter <sven@svenpeter.dev> 11 12description: |+ 13 Apple SoCs may contain an implementation of their Device Address 14 Resolution Table which provides a mandatory layer of address 15 translations for various masters. 16 17 Each DART instance is capable of handling up to 16 different streams 18 with individual pagetables and page-level read/write protection flags. 19 20 This DART IOMMU also raises interrupts in response to various 21 fault conditions. 22 23properties: 24 compatible: 25 enum: 26 - apple,t8103-dart 27 - apple,t8103-usb4-dart 28 - apple,t8110-dart 29 - apple,t6000-dart 30 31 reg: 32 maxItems: 1 33 34 interrupts: 35 maxItems: 1 36 37 clocks: 38 description: 39 Reference to the gate clock phandle if required for this IOMMU. 40 Optional since not all IOMMUs are attached to a clock gate. 41 42 '#iommu-cells': 43 const: 1 44 description: 45 Has to be one. The single cell describes the stream id emitted by 46 a master to the IOMMU. 47 48 power-domains: 49 maxItems: 1 50 51required: 52 - compatible 53 - reg 54 - '#iommu-cells' 55 - interrupts 56 57additionalProperties: false 58 59examples: 60 - |+ 61 dart1: iommu@82f80000 { 62 compatible = "apple,t8103-dart"; 63 reg = <0x82f80000 0x4000>; 64 interrupts = <1 781 4>; 65 #iommu-cells = <1>; 66 }; 67 68 master1 { 69 iommus = <&dart1 0>; 70 }; 71 72 - |+ 73 dart2a: iommu@82f00000 { 74 compatible = "apple,t8103-dart"; 75 reg = <0x82f00000 0x4000>; 76 interrupts = <1 781 4>; 77 #iommu-cells = <1>; 78 }; 79 dart2b: iommu@82f80000 { 80 compatible = "apple,t8103-dart"; 81 reg = <0x82f80000 0x4000>; 82 interrupts = <1 781 4>; 83 #iommu-cells = <1>; 84 }; 85 86 master2 { 87 iommus = <&dart2a 0>, <&dart2b 1>; 88 }; 89