1*c66ec88fSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*c66ec88fSEmmanuel Vadot%YAML 1.2 3*c66ec88fSEmmanuel Vadot--- 4*c66ec88fSEmmanuel Vadot$id: http://devicetree.org/schemas/interrupt-controller/renesas,rza1-irqc.yaml# 5*c66ec88fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadottitle: Renesas RZ/A1 Interrupt Controller 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadotmaintainers: 10*c66ec88fSEmmanuel Vadot - Chris Brandt <chris.brandt@renesas.com> 11*c66ec88fSEmmanuel Vadot - Geert Uytterhoeven <geert+renesas@glider.be> 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel Vadotdescription: | 14*c66ec88fSEmmanuel Vadot The RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas RZ/A1 and 15*c66ec88fSEmmanuel Vadot RZ/A2 SoCs: 16*c66ec88fSEmmanuel Vadot - IRQ sense select for 8 external interrupts, 1:1-mapped to 8 GIC SPI interrupts, 17*c66ec88fSEmmanuel Vadot - NMI edge select. 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel VadotallOf: 20*c66ec88fSEmmanuel Vadot - $ref: /schemas/interrupt-controller.yaml# 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel Vadotproperties: 23*c66ec88fSEmmanuel Vadot compatible: 24*c66ec88fSEmmanuel Vadot items: 25*c66ec88fSEmmanuel Vadot - enum: 26*c66ec88fSEmmanuel Vadot - renesas,r7s72100-irqc # RZ/A1H 27*c66ec88fSEmmanuel Vadot - renesas,r7s9210-irqc # RZ/A2M 28*c66ec88fSEmmanuel Vadot - const: renesas,rza1-irqc 29*c66ec88fSEmmanuel Vadot 30*c66ec88fSEmmanuel Vadot '#interrupt-cells': 31*c66ec88fSEmmanuel Vadot const: 2 32*c66ec88fSEmmanuel Vadot 33*c66ec88fSEmmanuel Vadot '#address-cells': 34*c66ec88fSEmmanuel Vadot const: 0 35*c66ec88fSEmmanuel Vadot 36*c66ec88fSEmmanuel Vadot interrupt-controller: true 37*c66ec88fSEmmanuel Vadot 38*c66ec88fSEmmanuel Vadot reg: 39*c66ec88fSEmmanuel Vadot maxItems: 1 40*c66ec88fSEmmanuel Vadot 41*c66ec88fSEmmanuel Vadot interrupt-map: 42*c66ec88fSEmmanuel Vadot maxItems: 8 43*c66ec88fSEmmanuel Vadot description: Specifies the mapping from external interrupts to GIC interrupts. 44*c66ec88fSEmmanuel Vadot 45*c66ec88fSEmmanuel Vadot interrupt-map-mask: 46*c66ec88fSEmmanuel Vadot items: 47*c66ec88fSEmmanuel Vadot - const: 7 48*c66ec88fSEmmanuel Vadot - const: 0 49*c66ec88fSEmmanuel Vadot 50*c66ec88fSEmmanuel Vadotrequired: 51*c66ec88fSEmmanuel Vadot - compatible 52*c66ec88fSEmmanuel Vadot - '#interrupt-cells' 53*c66ec88fSEmmanuel Vadot - '#address-cells' 54*c66ec88fSEmmanuel Vadot - interrupt-controller 55*c66ec88fSEmmanuel Vadot - reg 56*c66ec88fSEmmanuel Vadot - interrupt-map 57*c66ec88fSEmmanuel Vadot - interrupt-map-mask 58*c66ec88fSEmmanuel Vadot 59*c66ec88fSEmmanuel VadotadditionalProperties: false 60*c66ec88fSEmmanuel Vadot 61*c66ec88fSEmmanuel Vadotexamples: 62*c66ec88fSEmmanuel Vadot - | 63*c66ec88fSEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 64*c66ec88fSEmmanuel Vadot irqc: interrupt-controller@fcfef800 { 65*c66ec88fSEmmanuel Vadot compatible = "renesas,r7s72100-irqc", "renesas,rza1-irqc"; 66*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 67*c66ec88fSEmmanuel Vadot #address-cells = <0>; 68*c66ec88fSEmmanuel Vadot interrupt-controller; 69*c66ec88fSEmmanuel Vadot reg = <0xfcfef800 0x6>; 70*c66ec88fSEmmanuel Vadot interrupt-map = 71*c66ec88fSEmmanuel Vadot <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 72*c66ec88fSEmmanuel Vadot <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 73*c66ec88fSEmmanuel Vadot <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 74*c66ec88fSEmmanuel Vadot <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 75*c66ec88fSEmmanuel Vadot <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 76*c66ec88fSEmmanuel Vadot <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 77*c66ec88fSEmmanuel Vadot <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 78*c66ec88fSEmmanuel Vadot <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 79*c66ec88fSEmmanuel Vadot interrupt-map-mask = <7 0>; 80*c66ec88fSEmmanuel Vadot }; 81