xref: /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt (revision 59c8e88e72633afbc47a4ace0d2170d00d51f7dc)
1Microsemi Ocelot SoC ICPU Interrupt Controller
2
3Required properties:
4
5- compatible : should be "mscc,ocelot-icpu-intr"
6- reg : Specifies base physical address and size of the registers.
7- interrupt-controller : Identifies the node as an interrupt controller
8- #interrupt-cells : Specifies the number of cells needed to encode an
9  interrupt source. The value shall be 1.
10- interrupts : Specifies the CPU interrupt the controller is connected to.
11
12Example:
13
14		intc: interrupt-controller@70000070 {
15			compatible = "mscc,ocelot-icpu-intr";
16			reg = <0x70000070 0x70>;
17			#interrupt-cells = <1>;
18			interrupt-controller;
19			interrupt-parent = <&cpuintc>;
20			interrupts = <2>;
21		};
22