xref: /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel VadotMicrosemi Ocelot SoC ICPU Interrupt Controller
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotRequired properties:
4*c66ec88fSEmmanuel Vadot
5*c66ec88fSEmmanuel Vadot- compatible : should be "mscc,ocelot-icpu-intr"
6*c66ec88fSEmmanuel Vadot- reg : Specifies base physical address and size of the registers.
7*c66ec88fSEmmanuel Vadot- interrupt-controller : Identifies the node as an interrupt controller
8*c66ec88fSEmmanuel Vadot- #interrupt-cells : Specifies the number of cells needed to encode an
9*c66ec88fSEmmanuel Vadot  interrupt source. The value shall be 1.
10*c66ec88fSEmmanuel Vadot- interrupts : Specifies the CPU interrupt the controller is connected to.
11*c66ec88fSEmmanuel Vadot
12*c66ec88fSEmmanuel VadotExample:
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14*c66ec88fSEmmanuel Vadot		intc: interrupt-controller@70000070 {
15*c66ec88fSEmmanuel Vadot			compatible = "mscc,ocelot-icpu-intr";
16*c66ec88fSEmmanuel Vadot			reg = <0x70000070 0x70>;
17*c66ec88fSEmmanuel Vadot			#interrupt-cells = <1>;
18*c66ec88fSEmmanuel Vadot			interrupt-controller;
19*c66ec88fSEmmanuel Vadot			interrupt-parent = <&cpuintc>;
20*c66ec88fSEmmanuel Vadot			interrupts = <2>;
21*c66ec88fSEmmanuel Vadot		};
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