1*ae5de77eSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*ae5de77eSEmmanuel Vadot%YAML 1.2 3*ae5de77eSEmmanuel Vadot--- 4*ae5de77eSEmmanuel Vadot$id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-sei.yaml# 5*ae5de77eSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ae5de77eSEmmanuel Vadot 7*ae5de77eSEmmanuel Vadottitle: Marvell SEI (System Error Interrupt) Controller 8*ae5de77eSEmmanuel Vadot 9*ae5de77eSEmmanuel Vadotmaintainers: 10*ae5de77eSEmmanuel Vadot - Miquel Raynal <miquel.raynal@bootlin.com> 11*ae5de77eSEmmanuel Vadot 12*ae5de77eSEmmanuel Vadotdescription: > 13*ae5de77eSEmmanuel Vadot Marvell SEI (System Error Interrupt) controller is an interrupt aggregator. It 14*ae5de77eSEmmanuel Vadot receives interrupts from several sources and aggregates them to a single 15*ae5de77eSEmmanuel Vadot interrupt line (an SPI) on the parent interrupt controller. 16*ae5de77eSEmmanuel Vadot 17*ae5de77eSEmmanuel Vadot This interrupt controller can handle up to 64 SEIs, a set comes from the AP 18*ae5de77eSEmmanuel Vadot and is wired while a second set comes from the CPs by the mean of MSIs. 19*ae5de77eSEmmanuel Vadot 20*ae5de77eSEmmanuel Vadotproperties: 21*ae5de77eSEmmanuel Vadot compatible: 22*ae5de77eSEmmanuel Vadot const: marvell,ap806-sei 23*ae5de77eSEmmanuel Vadot 24*ae5de77eSEmmanuel Vadot reg: 25*ae5de77eSEmmanuel Vadot maxItems: 1 26*ae5de77eSEmmanuel Vadot 27*ae5de77eSEmmanuel Vadot interrupts: 28*ae5de77eSEmmanuel Vadot maxItems: 1 29*ae5de77eSEmmanuel Vadot 30*ae5de77eSEmmanuel Vadot '#interrupt-cells': 31*ae5de77eSEmmanuel Vadot const: 1 32*ae5de77eSEmmanuel Vadot 33*ae5de77eSEmmanuel Vadot interrupt-controller: true 34*ae5de77eSEmmanuel Vadot 35*ae5de77eSEmmanuel Vadot msi-controller: true 36*ae5de77eSEmmanuel Vadot 37*ae5de77eSEmmanuel Vadotrequired: 38*ae5de77eSEmmanuel Vadot - compatible 39*ae5de77eSEmmanuel Vadot - reg 40*ae5de77eSEmmanuel Vadot - interrupts 41*ae5de77eSEmmanuel Vadot - '#interrupt-cells' 42*ae5de77eSEmmanuel Vadot - interrupt-controller 43*ae5de77eSEmmanuel Vadot - msi-controller 44*ae5de77eSEmmanuel Vadot 45*ae5de77eSEmmanuel VadotadditionalProperties: false 46*ae5de77eSEmmanuel Vadot 47*ae5de77eSEmmanuel Vadotexamples: 48*ae5de77eSEmmanuel Vadot - | 49*ae5de77eSEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 50*ae5de77eSEmmanuel Vadot 51*ae5de77eSEmmanuel Vadot interrupt-controller@3f0200 { 52*ae5de77eSEmmanuel Vadot compatible = "marvell,ap806-sei"; 53*ae5de77eSEmmanuel Vadot reg = <0x3f0200 0x40>; 54*ae5de77eSEmmanuel Vadot interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 55*ae5de77eSEmmanuel Vadot #interrupt-cells = <1>; 56*ae5de77eSEmmanuel Vadot interrupt-controller; 57*ae5de77eSEmmanuel Vadot msi-controller; 58*ae5de77eSEmmanuel Vadot }; 59