1* Freescale Layerscape external IRQs 2 3Some Layerscape SOCs (LS1021A, LS1043A, LS1046A) support inverting 4the polarity of certain external interrupt lines. 5 6The device node must be a child of the node representing the 7Supplemental Configuration Unit (SCFG). 8 9Required properties: 10- compatible: should be "fsl,<soc-name>-extirq", e.g. "fsl,ls1021a-extirq". 11- #interrupt-cells: Must be 2. The first element is the index of the 12 external interrupt line. The second element is the trigger type. 13- #address-cells: Must be 0. 14- interrupt-controller: Identifies the node as an interrupt controller 15- reg: Specifies the Interrupt Polarity Control Register (INTPCR) in 16 the SCFG. 17- interrupt-map: Specifies the mapping from external interrupts to GIC 18 interrupts. 19- interrupt-map-mask: Must be <0xffffffff 0>. 20 21Example: 22 scfg: scfg@1570000 { 23 compatible = "fsl,ls1021a-scfg", "syscon"; 24 reg = <0x0 0x1570000 0x0 0x10000>; 25 big-endian; 26 #address-cells = <1>; 27 #size-cells = <1>; 28 ranges = <0x0 0x0 0x1570000 0x10000>; 29 30 extirq: interrupt-controller@1ac { 31 compatible = "fsl,ls1021a-extirq"; 32 #interrupt-cells = <2>; 33 #address-cells = <0>; 34 interrupt-controller; 35 reg = <0x1ac 4>; 36 interrupt-map = 37 <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, 38 <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, 39 <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, 40 <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, 41 <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 42 <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 43 interrupt-map-mask = <0xffffffff 0x0>; 44 }; 45 }; 46 47 48 interrupts-extended = <&gic GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 49 <&extirq 1 IRQ_TYPE_LEVEL_LOW>; 50